/llvm-project/clang/test/Sema/ |
H A D | atomic-implicit-seq_cst.c | 3 // _Atomic operations are implicitly sequentially-consistent. Some codebases 10 …++atom; // expected-warning {{implicit use of sequentially-consistent atomic may incur stronger me… in bad_pre_inc() 14 …--atom; // expected-warning {{implicit use of sequentially-consistent atomic may incur stronger me… in bad_pre_dec() 18 …atom++; // expected-warning {{implicit use of sequentially-consistent atomic may incur stronger me… in bad_post_inc() 22 …atom--; // expected-warning {{implicit use of sequentially-consistent atomic may incur stronger me… in bad_post_dec() 26 …gimme_int(atom); // expected-warning {{implicit use of sequentially-consistent atomic may incur st… in bad_call() 30 …return +atom; // expected-warning {{implicit use of sequentially-consistent atomic may incur stron… in bad_unary_plus() 34 …return -atom; // expected-warning {{implicit use of sequentially-consistent atomic may incur stron… in bad_unary_minus() 38 …return !atom; // expected-warning {{implicit use of sequentially-consistent atomic may incur stron… in bad_unary_logical_not() 42 …return ~atom; // expected-warning {{implicit use of sequentially-consistent atomic may incur stron… in bad_unary_bitwise_not() [all …]
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H A D | sync-implicit-seq_cst.c | 3 // __sync_* operations are implicitly sequentially-consistent. Some codebases 6 …nc_fetch_and_add(ptr, val); } // expected-warning {{implicit use of sequentially-consistent atom… in fetch_and_add() 7 …nc_fetch_and_sub(ptr, val); } // expected-warning {{implicit use of sequentially-consistent atom… in fetch_and_sub() 8 …c_fetch_and_or(ptr, val); } // expected-warning {{implicit use of sequentially-consistent atom… in fetch_and_or() 9 …nc_fetch_and_and(ptr, val); } // expected-warning {{implicit use of sequentially-consistent atom… in fetch_and_and() 10 …nc_fetch_and_xor(ptr, val); } // expected-warning {{implicit use of sequentially-consistent atom… in fetch_and_xor() 11 …ync_fetch_and_nand(ptr, val); } // expected-warning {{implicit use of sequentially-consistent atom… in fetch_and_nand() 13 …nc_add_and_fetch(ptr, val); } // expected-warning {{implicit use of sequentially-consistent atom… in add_and_fetch() 14 …nc_sub_and_fetch(ptr, val); } // expected-warning {{implicit use of sequentially-consistent atom… in sub_and_fetch() 15 …c_or_and_fetch(ptr, val); } // expected-warning {{implicit use of sequentially-consistent atom… in or_and_fetch() [all …]
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/llvm-project/mlir/include/mlir/IR/ |
H A D | Threading.h | 34 /// processes elements sequentially. 88 /// elements sequentially. 103 /// processes elements sequentially. 115 /// sequentially. 128 /// sequentially. 139 /// sequentially.
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H A D | BuiltinAttributeInterfaces.h | 30 /// range, where all of the elements are layed out sequentially in memory. A 69 // elements are layed out sequentially in memory.
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/llvm-project/llvm/tools/llvm-exegesis/lib/ |
H A D | MCInstrDescView.h | 123 // Repeating this instruction is guaranteed to executes sequentially. 127 // Repeating this instruction is guaranteed to executes sequentially. 131 // Repeating this instruction may execute sequentially by picking aliasing 137 // Repeating this instruction may execute sequentially by picking aliasing 147 // Repeating this instruction executes sequentially with an instruction that 152 // Repeating this instruction may execute sequentially by adding an
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/llvm-project/bolt/include/bolt/Core/ |
H A D | ParallelUtilities.h | 12 // flags is passed, all jobs will execute sequentially. 59 /// work sequentially. 71 /// work sequentially.
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/llvm-project/cross-project-tests/debuginfo-tests/dexter/dex/command/commands/ |
H A D | DexExpectWatchValue.py | 15 sequentially.
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/llvm-project/llvm/test/CodeGen/WebAssembly/ |
H A D | atomic-fence.ll | 16 ; because atomic memory access in wasm are sequentially consistent.
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/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIMemoryLegalizer.cpp | 1003 /// sequentially consistent, and no other thread can access scratch in enableStoreCacheBypass() 1215 /// sequentially consistent, and no other thread can access scratch in insertRelease() 1275 /// sequentially consistent, and no other thread can access scratch in enableLoadCacheBypass() 1320 /// sequentially consistent, and no other thread can access scratch in enableStoreCacheBypass() 1355 /// sequentially consistent, and no other thread can access scratch in enableRMWCacheBypass() 1517 /// sequentially consistent, and no other thread can access scratch in insertRelease() 1616 /// sequentially consistent, and no other thread can access scratch in enableStoreCacheBypass() 1656 /// sequentially consistent, and no other thread can access scratch in enableRMWCacheBypass() 1808 /// sequentially consistent, and no other thread can access scratch in insertRelease() 1917 /// sequentially consisten in enableVolatileAndOrNonTemporal() [all...] |
/llvm-project/llvm/include/llvm/DebugInfo/CodeView/ |
H A D | TypeVisitorCallbacks.h | 28 /// records are being visited sequentially or randomly. An implementation
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/llvm-project/flang/runtime/ |
H A D | iostat.cpp | 101 "only be processed sequentially"; in IostatErrorString()
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/llvm-project/llvm/test/CodeGen/AMDGPU/ |
H A D | s_or_saveexec_xor_combine.mir | 85 # Ensure the transformation does not get applied if the instructions don't appear sequentially.
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/llvm-project/lld/MachO/ |
H A D | ConcatOutputSection.h | 24 // contains all such sections and writes the data from each section sequentially
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/llvm-project/compiler-rt/lib/tsan/rtl/ |
H A D | tsan_flags.inc | 40 "If set, all atomics are effectively sequentially consistent (seq_cst), "
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/llvm-project/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyISelDAGToDAG.cpp | 155 // Currently wasm only supports sequentially consistent atomics, so we in Select() 156 // always set the order to 0 (sequentially consistent). in Select()
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/llvm-project/clang/docs/ |
H A D | ConstantInterpreter.rst | 172 Array elements are stored sequentially, without padding, after the pointer 179 allocation site. Descriptors and elements are stored sequentially in the
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/llvm-project/compiler-rt/lib/ctx_profile/ |
H A D | CtxInstrProfiling.h | 87 // collecting sequentially on one thread at a time is expected to converge to
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/llvm-project/llvm/docs/ |
H A D | HowToUpdateDebugInfo.rst | 271 The instructions are assigned sequentially increasing line locations, and are 440 ``mir-debugify`` inserts sequentially increasing line locations to each
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/llvm-project/llvm/test/CodeGen/SPIRV/instructions/ |
H A D | atomic_seq.ll | 18 ;; "sequentially consistent" maps to constant 16
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/llvm-project/clang/lib/Frontend/ |
H A D | SARIFDiagnostic.cpp | 173 // paths are resolved sequentially, and, thereby, the path in emitFilename()
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/llvm-project/mlir/lib/Dialect/Affine/Transforms/ |
H A D | AffineLoopInvariantCodeMotion.cpp | 192 // For all instructions that we found to be invariant, place sequentially in checkInvarianceOfNestedIfOps()
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/llvm-project/mlir/unittests/Interfaces/ |
H A D | ControlFlowInterfacesTest.cpp | 85 /// Regions are executed sequentially.
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/llvm-project/llvm/tools/llvm-cfi-verify/lib/ |
H A D | FileAnalysis.h | 123 // instruction sequentially as it will follow unconditional branches (assuming
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/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/ |
H A D | RISCVMCTargetDesc.cpp | 168 // Terminators mark the end of a basic block which means the sequentially in resetState()
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/llvm-project/llvm/lib/DWARFLinker/Parallel/ |
H A D | DWARFLinkerImpl.h | 350 /// \defgroup Data members accessed sequentially.
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