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/freebsd-src/sys/contrib/device-tree/Bindings/soc/ti/
H A Dsci-pm-domain.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/ti/sci
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H A Dsci-pm-domain.txt1 Texas Instruments TI-SCI Generic Power Domain
2 ---------------------------------------------
7 controller happens through a protocol known as TI-SCI [1].
9 [1] Documentation/devicetree/bindings/arm/keystone/ti,sci.txt
11 PM Domain Node
13 The PM domain node represents the global PM domain managed by the PMMC, which
14 in this case is the implementation as documented by the generic PM domain
15 bindings in Documentation/devicetree/bindings/power/power-domain.yaml. Because
16 this relies on the TI SCI protocol to communicate with the PMMC it must be a
20 --------------------
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H A Dti,pruss.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schema
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/freebsd-src/sys/contrib/device-tree/Bindings/arm/keystone/
H A Dti,sci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/keystone/ti,sci
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/freebsd-src/sys/contrib/device-tree/Bindings/i2c/
H A Di2c-davinci.txt7 - compatible: "ti,davinci-i2c" or "ti,keystone-i2c";
8 - reg : Offset and length of the register set for the device
9 - clocks: I2C functional clock phandle.
11 Documentation/devicetree/bindings/clock/ti,sci-clk.yaml
13 SoC-specific Required Properties:
17 - power-domains: Should contain a phandle to a PM domain provider node
20 Documentation/devicetree/bindings/soc/ti/sci-pm-domain.yaml
23 - interrupts : standard interrupt property.
24 - clock-frequency : desired I2C bus clock frequency in Hz.
25 - ti,has-pfunc: boolean; if defined, it indicates that SoC supports PFUNC
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/freebsd-src/sys/contrib/device-tree/src/arm64/ti/
H A Dk3-am65-wakeup.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Device Tree Source for AM6 SoC Family Wakeup Domain peripherals
5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/
9 dmsc: system-controller@44083000 {
10 compatible = "ti,am654-sci";
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H A Dk3-j7200-mcu-wakeup.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Device Tree Source for J7200 SoC Family MCU/WAKEUP Domain peripherals
5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
9 dmsc: system-controller@44083000 {
10 compatible = "ti,k2g-sci";
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H A Dk3-j721e-mcu-wakeup.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Device Tree Source for J721E SoC Family MCU/WAKEUP Domain peripherals
5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/
9 dmsc: system-controller@44083000 {
10 compatible = "ti,k2g-sci";
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H A Dk3-j784s4-mcu-wakeup.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Device Tree Source for J784S4 SoC Family MCU/WAKEUP Domain peripherals
5 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/
9 sms: system-controller@44083000 {
10 bootph-all;
11 compatible = "ti,k2g-sc
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H A Dk3-j721s2-mcu-wakeup.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Device Tree Source for J721S2 SoC Family MCU/WAKEUP Domain peripherals
5 * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/
9 sms: system-controller@44083000 {
10 compatible = "ti,k2g-sci";
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H A Dk3-am62p-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Device Tree file for the AM62P MAIN domain peripherals
5 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "ti,am62-usb";
14 clock-names = "ref";
15 ti,syscon-ph
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H A Dk3-am62a-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Device Tree Source for AM62A SoC Family Main Domain peripherals
5 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "mmio-sram";
12 #address-cells = <1>;
13 #size-cell
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H A Dk3-am62-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Device Tree Source for AM625 SoC Family Main Domain peripherals
5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "mmio-sram";
12 #address-cells = <1>;
13 #size-cell
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H A Dk3-am64-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Device Tree Source for AM642 SoC Family Main Domain peripherals
5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/phy/phy-cadence.h>
9 #include <dt-binding
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/freebsd-src/sys/contrib/device-tree/Bindings/net/can/
H A Dc_can.txt2 -------------------------------------------------
5 - compatible : Should be "bosch,c_can" for C_CAN controllers and
7 Can be "ti,dra7-d_can", "ti,am3352-d_can" or
8 "ti,am4372-d_can".
9 - reg : physical base address and size of the C_CAN/D_CAN
11 - interrupts : property with a value describing the interrupt
15 - ti,hwmods : Must be "d_can<n>" or "c_can<n>", n being the
19 - power-domains : Should contain a phandle to a PM domain provider node
22 Documentation/devicetree/bindings/soc/ti/sci-pm-domain.yaml
23 - clocks : CAN functional clock phandle. This property is as per the
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/freebsd-src/sys/contrib/device-tree/Bindings/usb/
H A Dti,keystone-dwc3.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/ti,keystone-dwc3.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Roger Quadros <rogerq@kernel.org>
15 - enum:
16 - ti,keystone-dwc3
17 - ti,am654-dwc3
22 '#address-cells':
25 '#size-cells':
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H A Dti,am62-usb.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/usb/ti,am62-us
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H A Dti,j721e-usb.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/usb/ti,j721e-usb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI wrapper module for the Cadence USBSS-DRD controller
10 - Roge
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/freebsd-src/sys/contrib/device-tree/Bindings/mmc/
H A Dti-omap-hsmmc.txt10 --------------------
11 - compatible:
12 Should be "ti,omap2-hsmmc", for OMAP2 controllers
13 Should be "ti,omap3-hsmmc", for OMAP3 controllers
14 Should be "ti,omap3-pre-es3-hsmmc" for OMAP3 controllers pre ES3.0
15 Should be "ti,omap4-hsmmc", for OMAP4 controllers
16 Should be "ti,am33xx-hsmmc", for AM335x controllers
17 Should be "ti,k2g-hsmmc", "ti,omap4-hsmmc" for 66AK2G controllers.
20 ---------------------------------
22 - ti,hwmods: Must be "mmc<n>", n is controller instance starting 1.
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/freebsd-src/sys/contrib/device-tree/Bindings/dma/
H A Dti-edma.txt8 ------------------------------------------------------------------------------
12 --------------------
13 - compatible: Should be:
14 - "ti,edma3-tpcc" for the channel controller(s) on OMAP,
16 - "ti,k2g-edma3-tpcc", "ti,edma3-tpcc" for the
18 - #dma-cells: Should be set to <2>. The first number is the DMA request
20 - reg: Memory map of eDMA CC
21 - reg-names: "edma3_cc"
22 - interrupts: Interrupt lines for CCINT, MPERR and CCERRINT.
23 - interrupt-names: "edma3_ccint", "edma3_mperr" and "edma3_ccerrint"
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/freebsd-src/sys/contrib/device-tree/Bindings/remoteproc/
H A Dti,keystone-rproc.txt5 sub-systems that are used to offload some of the processor-intensive tasks or
8 These processor sub-systems usually contain additional sub-modules like L1
15 Each DSP Core sub-system is represented as a single DT node, and should also
22 --------------------
25 - compatible: Should be one of the following,
26 "ti,k2hk-dsp" for DSPs on Keystone 2 66AK2H/K SoCs
27 "ti,k2l-dsp" for DSPs on Keystone 2 66AK2L SoCs
28 "ti,k2e-dsp" for DSPs on Keystone 2 66AK2E SoCs
29 "ti,k2g-dsp" for DSPs on Keystone 2 66AK2G SoCs
31 - reg: Should contain an entry for each value in 'reg-names'.
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H A Dti,k3-r5f-rproc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/ti,k3-r5f-rproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Suman Anna <s-anna@ti.com>
13 The TI K3 family of SoCs usually have one or more dual-core Arm Cortex R5F
20 AM64x SoCs do not support LockStep mode, but rather a new non-safety mode
21 called "Single-CPU" mode, where only Core0 is used, but with ability to use
27 Each Dual-Core R5F sub-system is represented as a single DTS node
40 - ti,am62-r5fss
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/freebsd-src/sys/contrib/device-tree/Bindings/spi/
H A Dspi-davinci.txt4 Keystone 2 - https://www.ti.com/lit/ug/sprugp2a/sprugp2a.pdf
5 dm644x - https://www.ti.com/lit/ug/sprue32a/sprue32a.pdf
6 OMAP-L138/da830 - http://www.ti.com/lit/ug/spruh77a/spruh77a.pdf
9 - #address-cells: number of cells required to define a chip select
11 - #size-cells: should be zero.
12 - compatible:
13 - "ti,dm6441-spi" for SPI used similar to that on DM644x SoC family
14 - "ti,da830-spi" for SPI used similar to that on DA8xx SoC family
15 - "ti,keystone-spi" for SPI used similar to that on Keystone2 SoC
17 - reg: Offset and length of SPI controller register space
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/freebsd-src/sys/contrib/device-tree/src/arm/ti/keystone/
H A Dkeystone-k2g.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2017 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/pinctrl/keystone.h>
10 #include <dt-binding
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/freebsd-src/sys/dev/acpica/
H A Dacpivar.h1 /*-
78 struct apm_clone_data *acpi_clone; /* Pseudo-dev for devd(8). */
147 * are interrupts (the SCI), notifies, task queue threads, and the thermal
153 * Each ACPI device can have its own driver-specific mutex for protecting
160 * ACPI-CA handles its own locking and should not be called with locks held.
163 * GPE -> EC runs _Qxx -> _Qxx reads EC space -> GPE
180 * ACPI CA does not define layers for non-ACPI CA drivers.
205 * See the Intel document titled "Intel Processor Vendor-Specifi
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