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/freebsd-src/lib/libsys/
H A Dsched_setscheduler.231 .Nd set/get scheduling policy and scheduler parameters
43 system call sets the scheduling policy and scheduling parameters
58 the scheduling policy specified by
67 exists and if the calling process has permission, the scheduling
68 policy and scheduling parameters will be set for the process
74 is zero, the scheduling policy and scheduling
78 the scheduling parameters of another process is specified in
82 The scheduling policies are in
86 First-in-first-out fixed priority scheduling with no round robin scheduling;
90 Round-robin scheduling across same priority processes.
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H A Dsched_setparam.231 .Nd set/get scheduling parameters
43 system call sets the scheduling parameters of the process specified by
54 the current scheduling policy of the process specified by
64 exists and if the calling process has permission, the scheduling
70 is zero, the scheduling parameters are set for the calling process.
73 the scheduling parameters of another process is specified in
99 In this implementation, when the current scheduling policy for the
109 system call will return the scheduling parameters of a process specified
120 the scheduling parameters for the process whose process ID is equal to
125 scheduling parameters of another process are detailed in
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H A Dsched_get_priority_max.232 .Nd get scheduling parameter limits
49 for the scheduling policy specified by
67 should be one of the scheduling policy values defined in
71 First-in-first-out fixed priority scheduling with no round robin scheduling;
75 Round-robin scheduling across same priority processes.
97 argument does not represent a defined scheduling policy.
/freebsd-src/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DScheduleDAGInstrs.h1 //===- ScheduleDAGInstrs.h - MachineInstr Scheduling ------------*- C++ -*-===//
9 /// \file Implements the ScheduleDAGInstrs class, which implements scheduling
113 /// A ScheduleDAG for scheduling lists of MachineInstr.
130 /// it has taken responsibility for scheduling the terminator correctly.
136 // State specific to the current scheduling region.
152 /// scheduling region is mapped to an SUnit.
268 /// Gets the machine model for instruction scheduling. in getSchedClass()
271 /// Resolves and cache a resolved scheduling class for an SUnit. in getSchedClass()
283 /// Returns an iterator to the top of the current scheduling region.
286 /// Returns an iterator to the bottom of the current scheduling regio
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H A DMachineScheduler.h1 //===- MachineScheduler.h - MachineInstr Scheduling Pass --------*- C++ -*-===//
26 // scheduling while updating the instruction stream, register pressure, and live
28 // scheduler, but subtargets that require custom scheduling heuristics may
38 // that will run after DAG building and before list scheduling. DAG mutations
63 // including scheduling direction and register pressure tracking policy, can do
181 /// Define a generic scheduling policy for targets that don't provide their own
182 /// MachineSchedStrategy. This can be overriden for each scheduling region
191 // Allow the scheduler to force top-down or bottom-up scheduling. If neither
200 // Compute DFSResult for use in scheduling heuristics.
206 /// MachineSchedStrategy - Interface to the scheduling algorith
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H A DTargetSubtargetInfo.h75 // be performed before post-RA scheduling.
89 // -- Pipelines and scheduling information
196 /// for preRA scheduling with the source level scheduler.
213 /// By default this queries the PostRAScheduling bit in the scheduling model
227 /// Override generic scheduling policy within a region.
230 /// scheduling heuristics (no custom MachineSchedStrategy) to make in overrideSchedPolicy()
231 /// changes to the generic scheduling policy.
246 // be performed before post-RA scheduling.
273 // to enable post-RA scheduling.
285 /// scheduling, DAGCombin
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H A DTargetSchedule.h11 // Ideally, the scheduling interface would be fully defined in the MC layer.
29 /// Provide an instruction scheduling machine model to CodeGen passes.
51 /// Initialize the machine model for instruction scheduling.
68 /// scheduling model.
79 /// This models scheduling at each stage in the processor pipeline.
89 /// scheduling model or cycle-to-cycle itinerary data.
132 // scheduling class.
H A DScheduleDAG.h10 /// class for instruction schedulers. This encapsulates the scheduling DAG,
11 /// which is shared between SelectionDAG and MachineInstr scheduling.
47 /// Scheduling dependency. This represents one direction of an edge in the
48 /// scheduling DAG.
51 /// These are the different kinds of scheduling dependencies.
63 // Weak dependencies may be violated by the scheduling strategy, but only if
69 Barrier, ///< An unknown scheduling barrier.
241 /// Scheduling unit. This is a node in the scheduling DAG.
253 /// was cloned. (SD scheduling onl
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H A DScheduleHazardRecognizer.h1 //=- llvm/CodeGen/ScheduleHazardRecognizer.h - Scheduling Support -*- C++ -*-=//
10 // hazard-avoidance heuristics for scheduling.
74 /// by a non-scheduling pass, which does not use SUnits.
80 /// Note: This is only used during PostRA scheduling. EmitNoop is not called
87 /// by a non-scheduling pass, which does not use SUnits.
/freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DGCNSchedStrategy.h67 // Scheduling stages for this strategy.
75 // track register pressure for actual scheduling heuristics.
121 /// The goal of this scheduling strategy is to maximize kernel occupancy (i.e.
128 /// The goal of this scheduling strategy is to maximize ILP for a single wave
178 // Occupancy target at the beginning of function scheduling cycle.
244 // GCNSchedStrategy applies multiple scheduling stages to a function.
265 // Record the original order of instructions before scheduling.
268 // RP before scheduling the current region.
271 // RP after scheduling the current region.
279 // Initialize state for a scheduling stag
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H A DGCNSchedStrategy.cpp13 /// This pass will apply multiple scheduling stages to the same function.
15 /// entry point for the scheduling of those regions is
18 /// Generally, the reason for having multiple scheduling stages is to account
20 /// few scheduling regions will have register pressure high enough to limit
38 "reduction scheduling stage."),
44 "rescheduling for ILP scheduling stage."),
132 /// already allows 80% of SUs to take the fast path without changing scheduling in initCandidate()
133 /// at all. Further changes would either change scheduling, or require a lot in initCandidate()
442 LLVM_DEBUG(dbgs() << "Scheduling SU(" << SU->NodeNum << ") " in tryCandidate()
604 // Collect all scheduling region in getBBLiveInMap()
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/freebsd-src/contrib/llvm-project/llvm/include/llvm/MC/
H A DMCSchedule.h1 //===-- llvm/MC/MCSchedule.h - Scheduling -----------------------*- C++ -*-===//
10 // for scheduling and other instruction cost heuristics.
45 // the scheduler will avoid scheduling instructions with conflicting resources
62 /// particular scheduling class for the specified number of cycles.
81 /// Specify the latency in cpu cycles for a particular scheduling class and def
114 /// Summarize the scheduling resources required for an instruction of a
115 /// particular scheduling class.
199 /// Machine model for scheduling, bundling, and heuristics.
217 /// scheduling heuristics and aren't sufficiently represented in the abstract.
243 /// out-of-order constraints so that the target's scheduling strategy can apply
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/freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/
H A DPostRASchedulerList.cpp50 // Post-RA scheduling is enabled with
55 cl::desc("Enable scheduling after register allocation"),
59 cl::desc("Break post-RA scheduling anti-dependencies: "
151 /// startBlock - Initialize register live-range state for scheduling in
159 /// Initialize the scheduler state for the next scheduling region.
165 /// Notify that the scheduler has finished scheduling the current region.
168 /// Schedule - Schedule the instruction range using list scheduling.
231 /// Initialize state associated with the next scheduling region.
269 // Check for explicit enable/disable of post-ra scheduling. in enablePostRAScheduler()
292 // Check that post-RA scheduling i in runOnMachineFunction()
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H A DMachineScheduler.cpp81 cl::desc("Force top-down list scheduling"));
83 cl::desc("Force bottom-up list scheduling"));
93 cl::desc("Post reg-alloc list scheduling direction"),
99 "Force top-down post reg-alloc list scheduling"),
101 "Force bottom-up post reg-alloc list scheduling"),
103 "Force bidirectional post reg-alloc list scheduling")));
110 cl::desc("Verify machine instrs before and after machine scheduling"));
142 cl::desc("Stop scheduling after N instructions"), cl::init(~0U));
156 cl::desc("Enable register pressure scheduling."), cl::init(true));
205 // Machine Instruction Scheduling Pas
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZMachineScheduler.h9 // -------------------------- Post RA scheduling ---------------------------- //
10 // SystemZPostRASchedStrategy is a scheduling strategy which is plugged into
29 /// A MachineSchedStrategy implementation for SystemZ post RA scheduling.
118 /// Called for a region before scheduling.
123 /// PostRA scheduling does not track pressure.
126 // Process scheduling regions top-down so that scheduler states can be
127 // transferrred over scheduling boundaries.
149 /// Currently only scheduling top-down, so this method is empty.
H A DSystemZHazardRecognizer.h11 // This class is used by the SystemZ scheduling strategy to maintain
12 // the state during scheduling, and provide cost functions for
13 // scheduling candidates. This includes:
22 // scheduling region. Such instructions are "advanced" past and include
23 // single instructions before a scheduling region, branches etc.
25 // A block that has only one predecessor continues scheduling with the state
44 /// SystemZHazardRecognizer maintains the state for one MBB during scheduling.
120 /// Resolves and cache a resolved scheduling class for an SUnit.
/freebsd-src/lib/libpmc/pmu-events/arch/arm64/arm/cortex-a65/
H A Difu.json69 "PublicDescription": "This thread and the other thread both ready for scheduling in if0",
72 "BriefDescription": "This thread and the other thread both ready for scheduling in if0"
75 …blicDescription": "This thread was arbitrated when the other thread was also ready for scheduling",
78 …BriefDescription": "This thread was arbitrated when the other thread was also ready for scheduling"
87 …ription": "This thread was not arbitrated because it was not ready for scheduling. For example, du…
90 …"BriefDescription": "This thread was not arbitrated because it was not ready for scheduling. For e…
/freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DScheduleDAGSDNodes.h1 //===---- ScheduleDAGSDNodes.h - SDNode Scheduling --------------*- C++ -*-===//
10 // scheduling for an SDNode-based dependency graph.
32 /// ScheduleDAGSDNodes - A ScheduleDAG for scheduling SDNode-based DAGs.
42 /// SDNode-based scheduling graphs do not use SDep::Anti or SDep::Output
59 /// Run - perform scheduling.
89 /// predecessors / successors info nor the temporary scheduling states.
95 /// excludes nodes that aren't interesting to scheduling, and represents
170 /// ForceUnitLatencies - Return true if all scheduling edges should be given
H A DScheduleDAGVLIW.cpp45 /// supports / top-down scheduling.
88 /// Schedule - Schedule the DAG using list scheduling.
90 LLVM_DEBUG(dbgs() << "********** List Scheduling " << printMBBReference(*BB) in Schedule()
93 // Build the scheduling graph. in Schedule()
104 // Top-Down Scheduling
114 dbgs() << "*** Scheduling failed! ***\n"; in releaseSucc()
147 LLVM_DEBUG(dbgs() << "*** Scheduling [" << CurCycle << "]: "); in scheduleNodeTopDown()
159 /// listScheduleTopDown - The main loop of list scheduling for top-down
/freebsd-src/usr.bin/renice/
H A Drenice.845 scheduling priority of one or more running processes.
53 to have their scheduling priority altered.
57 their scheduling priority altered.
96 0 (the ``base'' scheduling priority),
124 Non super-users cannot increase scheduling priorities of their own processes,
/freebsd-src/usr.sbin/cxgbetool/
H A Dcxgbetool.8650 Bind the connection to the specified tx scheduling class.
722 Configure parameters for a scheduling class.
727 The "level" within the scheduling hierarchy which is being programed:
740 The mode in which the scheduling class is going to operate:
744 All of the "flows" bound to the scheduling class will be held to aggregate scheduling constraints.
747 Each of the "flows" bound to the scheduling class will be held to the scheduling constraints.
750 E.g. if the scheduling class has a TX bandwidth of 10Mb/s, in
755 mode, each of the "flows" bound to the scheduling clas
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/freebsd-src/share/man/man3/
H A Dpthread_schedparam.334 .Nd thread scheduling parameter manipulation
48 functions set and get the scheduling parameters of individual threads.
49 The scheduling policy for a thread can either be
75 Invalid value for scheduling parameters.
/freebsd-src/usr.bin/clang/lli/
H A Dlli.1177 Disable scheduling after register allocation.
209 =none: No scheduling: breadth first sequencing
210 =simple: Simple two pass scheduling: minimize critical path and maximize processor utilization
211 =simple\-noitin: Simple two pass scheduling: Same as simple except using generic latency
212 =list\-burr: Bottom\-up register reduction list scheduling
213 =list\-tdrr: Top\-down register reduction list scheduling
/freebsd-src/usr.bin/nice/
H A Dnice.133 .Nd execute a utility at an altered scheduling priority
44 at an altered scheduling priority, by incrementing its
49 The lower the nice value of a process, the higher its scheduling priority.
52 with a higher scheduling priority.
/freebsd-src/share/man/man4/
H A Dmac_priority.429 .Nd "policy for scheduling privileges of non-root users"
52 policy grants scheduling privileges based on
57 (gid 47) are allowed to run threads and processes with realtime scheduling
61 (gid 48) are allowed to run threads and processes with idle scheduling

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