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/freebsd-src/sys/contrib/device-tree/Bindings/net/
H A Dnvidia,tegra234-mgbe.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/nvidia,tegra234-mgbe.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Tegra234 MGBE Multi-Gigabit Ethernet Controller
10 - Thierry Reding <treding@nvidia.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 const: nvidia,tegra234-mgbe
20 reg-names:
22 - const: hypervisor
[all …]
H A Dxilinx_axienet.txt2 --------------------------------------------------------
7 segments of memory for buffering TX and RX, as well as the capability of
8 offloading TX/RX checksum calculation off the processor.
18 - compatible : Must be one of "xlnx,axi-ethernet-1.00.a",
19 "xlnx,axi-ethernet-1.01.a", "xlnx,axi-ethernet-2.01.a"
20 - reg : Address and length of the IO space, as well as the address
22 axistream-connected is specified, in which case the reg
24 - interrupts : Should be a list of 2 or 3 interrupts: TX DMA, RX DMA,
25 and optionally Ethernet core. If axistream-connected is
26 specified, the TX/RX DMA interrupts should be on that node
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H A Dethernet-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/ethernet-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - David S. Miller <davem@davemloft.net>
19 local-ma
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H A Dxlnx,axi-ethernet.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/xlnx,axi-etherne
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H A Dfsl-fman.txt5 - FMan Node
6 - FMan Port Node
7 - FMan MURAM Node
8 - FMan dTSEC/XGEC/mEMAC Node
9 - FMan IEEE 1588 Node
10 - FMan MDIO Node
11 - Example
18 Due to the fact that the FMan is an aggregation of sub-engines (ports, MACs,
23 - compatible
32 - cell-index
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H A Daltr,tse.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Maxime Chevallier <maxime.chevallier@bootlin.com>
15 - const: altr,tse-1.0
16 - const: ALTR,tse-1.0
18 - const: altr,tse-msgdma-1.0
23 interrupt-names:
25 - const: rx_irq
26 - const: tx_irq
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H A Dfsl,fman-dtsec.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/fsl,fman-dtse
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H A Damd-xgbe.txt1 * AMD 10GbE driver (amd-xgbe)
4 - compatible: Should be "amd,xgbe-seattle-v1a"
5 - reg: Address and length of the register sets for the device
6 - MAC registers
7 - PCS registers
8 - SerDes Rx/Tx registers
9 - SerDes integration registers (1/2)
10 - SerDes integration registers (2/2)
11 - interrupts: Should contain the amd-xgbe interrupt(s). The first interrupt
13 amd,per-channel-interrupt property is specified, then one additional
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/freebsd-src/sys/contrib/alpine-hal/eth/
H A Dal_hal_eth_mac_regs.h1 /*-
10 found at http://www.gnu.org/licenses/gpl-2.0.html
307 struct al_eth_mac_10g_stats_v3_rx rx; member
402 /* [0x28] XAUI PCS configuration */
404 /* [0x2c] XAUI PCS status */
406 /* [0x30] RXAUI PCS configuration */
408 /* [0x34] RXAUI PCS status */
446 /* [0x0] PCS register file address */
448 /* [0x4] PCS register file data */
462 /* [0x20] KR PCS config */
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/freebsd-src/sys/contrib/device-tree/src/arm64/freescale/
H A Dtqmls1088a-mbls10xxa-mc.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright (c) 2018-2023 TQ-Systems GmbH <linux@ew.tq-group.com>,
4 * D-82229 Seefeld, Germany.
10 #include <dt-bindings/net/ti-dp83867.h>
15 i2c-bus = <&sfp1_i2c>;
16 mod-def0-gpios = <&gpioexp2 2 GPIO_ACTIVE_LOW>;
17 los-gpios = <&gpioexp2 3 GPIO_ACTIVE_HIGH>;
18 tx-fault-gpios = <&gpioexp2 0 GPIO_ACTIVE_HIGH>;
19 tx-disable-gpios = <&gpioexp2 1 GPIO_ACTIVE_HIGH>;
24 i2c-bus = <&sfp2_i2c>;
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H A Dfsl-ls1088a-rdb.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Copyright 2017-2020 NXP
11 /dts-v1/;
13 #include "fsl-ls1088a.dtsi"
17 compatible = "fsl,ls1088a-rdb", "fsl,ls1088a";
21 phy-handle = <&mdio2_aquantia_phy>;
22 phy-connection-typ
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H A Dfsl-ls1088a-ten64.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * Based on fsl-ls1088a-rdb.dts
5 * Copyright 2017-2020 NXP
6 * Copyright 2019-2021 Traverse Technologies
11 /dts-v1/;
13 #include "fsl-ls1088a.dtsi"
15 #include <dt-binding
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/freebsd-src/sys/dev/cas/
H A Dif_casreg.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
30 * from: FreeBSD: if_gemreg.h 174987 2007-12-30 01:32:03Z marius
73 #define CAS_CAW_RX_WGHT_MASK 0x00000003 /* RX DMA factor for... */
75 #define CAS_CAW_TX_WGHT_MASK 0x0000000c /* RX DMA factor for... */
84 * Bits 0-9 of CAS_STATUS auto-clear when read. CAS_CLEAR_ALIAS specifies
85 * which of bits 0-9 auto-clear when reading CAS_STATUS_ALIAS.
91 #define CAS_INTR_RX_DONE 0x00000010 /* >=1 RX frames transferred. */
92 #define CAS_INTR_RX_BUF_NA 0x00000020 /* RX buffer not available */
93 #define CAS_INTR_RX_TAG_ERR 0x00000040 /* RX FIFO tag corrupted. */
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/freebsd-src/sys/contrib/device-tree/Bindings/phy/
H A Dqcom,qmp-usb-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,qmp-usb-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vinod Koul <vkoul@kernel.org>
19 - qcom,ipq6018-qmp-usb3-phy
20 - qcom,ipq8074-qmp-usb3-phy
21 - qcom,msm8996-qmp-usb3-phy
22 - qcom,msm8998-qmp-usb3-phy
23 - qcom,qcm2290-qmp-usb3-phy
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H A Dqcom,qmp-ufs-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,qmp-ufs-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vinod Koul <vkoul@kernel.org>
19 - qcom,msm8996-qmp-ufs-phy
20 - qcom,msm8998-qmp-ufs-phy
21 - qcom,sc8180x-qmp-ufs-phy
22 - qcom,sc8280xp-qmp-ufs-phy
23 - qcom,sdm845-qmp-ufs-phy
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H A Dqcom,msm8996-qmp-usb3-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,msm8996-qmp-usb3-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vinod Koul <vkoul@kernel.org>
17 qcom,sc8280xp-qmp-usb3-uni-phy.yaml.
22 - qcom,ipq6018-qmp-usb3-phy
23 - qcom,ipq8074-qmp-usb3-phy
24 - qcom,msm8996-qmp-usb3-phy
25 - qcom,msm8998-qmp-usb3-phy
[all …]
H A Dqcom,qmp-pcie-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,qmp-pcie-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vinod Koul <vkoul@kernel.org>
19 - qcom,ipq6018-qmp-pcie-phy
20 - qcom,ipq8074-qmp-gen3-pcie-phy
21 - qcom,ipq8074-qmp-pcie-phy
22 - qcom,msm8998-qmp-pcie-phy
23 - qcom,sc8180x-qmp-pcie-phy
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/freebsd-src/sys/arm/freescale/vybrid/
H A Dvf_spi.c1 /*-
68 #define MCR_CLR_RXF (1 << 10) /* Clear RX FIFO */
83 #define CTAR_PCSSCK_S 22 /* PCS to SCK Delay Prescaler */
88 #define CTAR_CSSCK_S 12 /* PCS to SCK Delay Scaler */
103 #define PUSHR_PCS_S 16 /* Select PCS signals */
106 #define SPI_POPR 0x38 /* POP RX FIFO Register */
126 { -1, 0 }
136 if (!ofw_bus_is_compatible(dev, "fsl,mvf600-spi")) in spi_probe()
151 if (bus_alloc_resources(dev, spi_spec, sc->res)) { in spi_attach()
157 sc->bs in spi_attach()
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/freebsd-src/sys/dev/gem/
H A Dif_gemreg.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
40 /* Note: Reading the status reg clears bits 0-6. */
58 #define GEM_CONFIG_BUG2FIX 0x00001000 /* fix RX hang after overflow */
69 * Bits 0-6 auto-clear when read.
78 #define GEM_INTR_PCS 0x00002000 /* Physical Code Sub-layer */
106 #define GEM_PCI_BIF_CNF_HOST_64 0x00000002 /* 64-bit host */
107 #define GEM_PCI_BIF_CNF_B64D_DS 0x00000004 /* no 64-bit data cycle */
116 /* GEM_RESET register bits -- TX and RX self clear when complete. */
118 #define GEM_RESET_RX 0x00000002 /* Reset RX half. */
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/freebsd-src/sys/contrib/device-tree/src/powerpc/fsl/
H A Dqoriq-fman3-0-10g-1-best-effort.dtsi4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
37 cell-index = <0x9>;
38 compatible = "fsl,fman-v3-port-rx";
40 fsl,fman-10g-port;
41 fsl,fman-best-effort-port;
45 cell-index = <0x29>;
46 compatible = "fsl,fman-v3-port-tx";
48 fsl,fman-10g-port;
49 fsl,fman-best-effort-port;
53 cell-index = <1>;
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H A Dqoriq-fman3-0-10g-0.dtsi4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
37 cell-index = <0x10>;
38 compatible = "fsl,fman-v3-port-rx";
40 fsl,fman-10g-port;
44 cell-index = <0x30>;
45 compatible = "fsl,fman-v3-port-tx";
47 fsl,fman-10g-port;
51 cell-index = <0x8>;
52 compatible = "fsl,fman-memac";
54 fsl,fman-ports = <&fman0_rx_0x10 &fman0_tx_0x30>;
[all …]
H A Dqoriq-fman3-1-10g-0.dtsi4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
37 cell-index = <0x10>;
38 compatible = "fsl,fman-v3-port-rx";
40 fsl,fman-10g-port;
44 cell-index = <0x30>;
45 compatible = "fsl,fman-v3-port-tx";
47 fsl,fman-10g-port;
51 cell-index = <0x8>;
52 compatible = "fsl,fman-memac";
54 fsl,fman-ports = <&fman1_rx_0x10 &fman1_tx_0x30>;
[all …]
H A Dqoriq-fman3-0-10g-1.dtsi4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
37 cell-index = <0x11>;
38 compatible = "fsl,fman-v3-port-rx";
40 fsl,fman-10g-port;
44 cell-index = <0x31>;
45 compatible = "fsl,fman-v3-port-tx";
47 fsl,fman-10g-port;
51 cell-index = <0x9>;
52 compatible = "fsl,fman-memac";
54 fsl,fman-ports = <&fman0_rx_0x11 &fman0_tx_0x31>;
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H A Dqoriq-fman3-1-10g-1.dtsi4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
37 cell-index = <0x11>;
38 compatible = "fsl,fman-v3-port-rx";
40 fsl,fman-10g-port;
44 cell-index = <0x31>;
45 compatible = "fsl,fman-v3-port-tx";
47 fsl,fman-10g-port;
51 cell-index = <0x9>;
52 compatible = "fsl,fman-memac";
54 fsl,fman-ports = <&fman1_rx_0x11 &fman1_tx_0x31>;
[all …]
H A Dqoriq-fman3-1-1g-3.dtsi4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
37 cell-index = <0xb>;
38 compatible = "fsl,fman-v3-port-rx";
43 cell-index = <0x2b>;
44 compatible = "fsl,fman-v3-port-tx";
49 cell-index = <3>;
50 compatible = "fsl,fman-memac";
52 fsl,fman-ports = <&fman1_rx_0x0b &fman1_tx_0x2b>;
53 ptp-timer = <&ptp_timer1>;
54 pcsphy-handle = <&pcsphy11>, <&qsgmiic_pcs3>;
[all …]

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