/freebsd-src/sys/contrib/device-tree/Bindings/net/ |
H A D | hisilicon-femac.txt | 4 - compatible: should contain one of the following version strings: 5 * "hisilicon,hisi-femac-v1" 6 * "hisilicon,hisi-femac-v2" 7 and the soc string "hisilicon,hi3516cv300-femac". 8 - reg: specifies base physical address(s) and size of the device registers. 11 - interrupts: should contain the MAC interrupt. 12 - clocks: A phandle to the MAC main clock. 13 - resets: should contain the phandle to the MAC reset signal(required) and 14 the PHY reset signal(optional). 15 - reset-names: should contain the reset signal name "mac"(required) [all …]
|
H A D | hisilicon-hix5hd2-gmac.txt | 4 - compatible: should contain one of the following SoC strings: 5 * "hisilicon,hix5hd2-gmac" 6 * "hisilicon,hi3798cv200-gmac" 7 * "hisilicon,hi3516a-gmac" 9 * "hisilicon,hisi-gmac-v1" 10 * "hisilicon,hisi-gmac-v2" 13 - reg: specifies base physical address(s) and size of the device registers. 16 - interrupts: should contain the MAC interrupt. 17 - #address-cells: must be <1>. 18 - #size-cells: must be <0>. [all …]
|
H A D | ethernet-phy.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/net/ethernet-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Andrew Lunn <andrew@lunn.ch> 11 - Floria [all...] |
H A D | qcom,ethqos.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bhupes [all...] |
H A D | snps,dwmac.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Alexandre Torgue <alexandre.torgue@foss.st.com> 11 - Giuseppe Cavallaro <peppe.cavallaro@st.com> 12 - Jos [all...] |
/freebsd-src/sys/contrib/device-tree/src/arm64/rockchip/ |
H A D | rk3568-fastrhino-r68s.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 3 #include "rk3568-fastrhino-r66s.dtsi" 7 compatible = "lunzn,fastrhino-r68s", "rockchip,rk3568"; 15 adc-keys { 16 compatible = "adc-key [all...] |
H A D | rk3568-nanopi-r5s.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 9 /dts-v1/; 10 #include "rk3568-nanopi-r5s.dtsi" 14 compatible = "friendlyarm,nanopi-r5s", "rockchip,rk3568"; 20 gpio-leds { 21 compatible = "gpio-leds"; 22 pinctrl-names = "default"; 23 pinctrl-0 = <&lan1_led_pin>, <&lan2_led_pin>, <&power_led_pin>, <&wan_led_pin>; 25 led-lan1 { 28 function-enumerator = <1>; [all …]
|
H A D | px30-engicam-common.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 15 vcc5v0_sys: vcc5v0-sys { 16 compatible = "regulator-fixed"; 17 regulator-name = "vcc5v0_sys"; /* +5V */ 18 regulator-always-on; 19 regulator-boot-on; 20 regulator-min-microvolt = <5000000>; 21 regulator-max-microvolt = <5000000>; 24 sdio_pwrseq: sdio-pwrseq { 25 compatible = "mmc-pwrseq-simple"; [all …]
|
H A D | rk3568-roc-pc.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/pinctrl/rockchip.h> 10 #include <dt-bindings/soc/rockchip,vop2.h> 15 compatible = "firefly,rk3568-roc-pc", "rockchip,rk3568"; 25 stdout-pat [all...] |
H A D | rk3399-ficus.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 9 /dts-v1/; 10 #include "rk3399-rock960.dtsi" 21 stdout-path = "serial2:1500000n8"; 24 clkin_gmac: external-gmac-clock { 25 compatible = "fixed-clock"; 26 clock-frequency = <125000000>; 27 clock-output-names = "clkin_gmac"; 28 #clock-cells = <0>; 32 compatible = "gpio-leds"; [all …]
|
H A D | rk3568-lubancat-2.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/leds/common.h> 11 #include <dt-bindings/pinctrl/rockchip.h> 12 #include <dt-bindings/soc/rockchip,vop2.h> 17 compatible = "embedfire,lubancat-2", "rockchip,rk3568"; 27 stdout-pat [all...] |
H A D | rk3568-bpi-r2-pro.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Author: Frank Wunderlich <frank-w@public-files.de> 7 /dts-v1/; 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/leds/common.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-binding [all...] |
H A D | rk3308-rock-pi-s.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 /dts-v1/; 9 #include <dt-bindings/leds/common.h> 24 stdout-path = "serial0:1500000n8"; 28 compatible = "gpio-leds"; 29 pinctrl-names = "default"; 30 pinctrl-0 = <&green_led>, <&heartbeat_led>; 32 green-le [all...] |
H A D | rk3368-evb.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Copyright (c) 2015 Caesar Wang <wxt@rock-chips.com> 6 #include <dt-bindings/input/input.h> 7 #include <dt-bindings/pwm/pwm.h> 17 stdout-path = "serial2:115200n8"; 26 compatible = "pwm-backlight"; 27 brightness-levels = < 60 default-brightnes [all...] |
/freebsd-src/sys/contrib/device-tree/src/arm64/amlogic/ |
H A D | meson-gxbb-p201.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 10 #include "meson-gxbb-p20x.dtsi" 11 #include <dt-bindings/sound/meson-aiu.h> 14 compatible = "amlogic,p201", "amlogic,meson-gxbb"; 18 compatible = "amlogic,gx-soun [all...] |
/freebsd-src/sys/dev/eqos/ |
H A D | if_eqos_fdt.c | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 28 * $Id: eqos_fdt.c 1049 2022-12-03 14:25:46Z sos $ 84 #define WR4(sc, o, v) bus_write_4(sc->res[EQOS_RES_MEM], (o), (v)) 87 {"snps,dwmac-4.20a", 1}, 103 if (OF_getencprop(node, "snps,reset-gpio", in eqos_phy_reset() 107 if (OF_getencprop(node, "snps,reset-delays-us", in eqos_phy_reset() 110 "Wrong property for snps,reset-delays-us"); in eqos_phy_reset() 117 "Can't find gpio controller for phy reset\n"); in eqos_phy_reset() 122 nitems(gpio_prop) - 1, in eqos_phy_reset() [all …]
|
/freebsd-src/sys/contrib/device-tree/src/arm64/qcom/ |
H A D | qcs404-evb-4000.dts | 1 // SPDX-License-Identifier: GPL-2.0 6 /dts-v1/; 8 #include <dt-bindings/gpio/gpio.h> 9 #include "qcs404-evb.dtsi" 13 compatible = "qcom,qcs404-evb-4000", "qcom,qcs404-evb", 20 snps,reset-gpio = <&tlmm 60 GPIO_ACTIVE_LOW>; 21 snps,reset-active-low; 22 snps,reset-delays-us = <0 10000 10000>; 24 pinctrl-names = "default"; 25 pinctrl-0 = <ðernet_defaults>; [all …]
|
/freebsd-src/sys/contrib/device-tree/src/arm/st/ |
H A D | stih410-b2260.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 6 /dts-v1/; 8 #include <dt-bindings/gpio/gpio.h> 12 compatible = "st,stih410-b2260", "st,stih410"; 15 stdout-path = &uart1; 29 compatible = "gpio-leds"; 30 led-user-green-1 { 33 linux,default-trigger = "heartbeat"; 34 default-state = "off"; 37 led-user-green-2 { [all …]
|
H A D | stih418-b2264.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 6 /dts-v1/; 8 #include <dt-bindings/gpio/gpio.h> 11 compatible = "st,stih418-b2264", "st,stih418"; 14 stdout-path = &sbc_serial0; 24 operating-points-v2 = <&cpu_opp_table>; 25 /* u-boot puts hpen in SBC dmem at 0xb8 offset */ 26 cpu-release-addr = <0x94100b8>; 29 operating-points-v2 = <&cpu_opp_table>; 30 /* u-boot puts hpen in SBC dmem at 0xb8 offset */ [all …]
|
/freebsd-src/sys/contrib/device-tree/src/arm/rockchip/ |
H A D | rockchip-radxa-dalang-carrier.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 #include <dt-bindings/pwm/pwm.h> 11 clkin_gmac: external-gmac-clock { 12 compatible = "fixed-clock"; 13 clock-frequency = <125000000>; 14 clock-output-names = "clkin_gmac"; 15 #clock-cells = <0>; 18 sdio_pwrseq: sdio-pwrseq { 19 compatible = "mmc-pwrseq-simple"; 21 clock-names = "ext_clock"; [all …]
|
H A D | rk3288-rock2-som.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 #include <dt-bindings/pwm/pwm.h> 12 emmc_pwrseq: emmc-pwrseq { 13 compatible = "mmc-pwrseq-emmc"; 14 pinctrl-0 = <&emmc_reset>; 15 pinctrl-names = "default"; 16 reset-gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_LOW>; 19 ext_gmac: external-gmac-clock { 20 compatible = "fixed-clock"; 21 #clock-cells = <0>; [all …]
|
/freebsd-src/sys/contrib/device-tree/src/mips/ingenic/ |
H A D | cu1000-neo.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 5 #include <dt-bindings/gpio/gpio.h> 6 #include <dt-bindings/clock/ingenic,sysost.h> 7 #include <dt-bindings/interrupt-controller/irq.h> 10 compatible = "yna,cu1000-neo", "ingenic,x1000e"; 11 model = "YSH & ATIL General Board CU1000-Neo"; 18 stdout-path = "serial2:115200n8"; 27 compatible = "gpio-leds"; 28 led-0 { [all …]
|
H A D | cu1830-neo.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 5 #include <dt-bindings/gpio/gpio.h> 6 #include <dt-bindings/clock/ingenic,sysost.h> 7 #include <dt-bindings/interrupt-controller/irq.h> 10 compatible = "yna,cu1830-neo", "ingenic,x1830"; 11 model = "YSH & ATIL General Board CU1830-Neo"; 18 stdout-path = "serial1:115200n8"; 27 compatible = "gpio-leds"; 28 led-0 { [all …]
|
/freebsd-src/sys/contrib/device-tree/src/arm64/hisilicon/ |
H A D | hi3798cv200-poplar.dts | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd. 8 /dts-v1/; 10 #include <dt-bindings/gpio/gpio.h> 12 #include "poplar-pinctrl.dtsi" 16 compatible = "hisilicon,hi3798cv200-poplar", "hisilicon,hi3798cv200"; 24 stdout-path = "serial0:115200n8"; 33 compatible = "gpio-leds"; 35 user-led0 { 38 linux,default-trigger = "heartbeat"; [all …]
|
/freebsd-src/sys/contrib/device-tree/src/arm/intel/socfpga/ |
H A D | socfpga_cyclone5_vining_fpga.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR X11) 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/input/input.h> 12 compatible = "samtec,vining", "altr,socfpga-cyclone5", "altr,socfpga"; 16 stdout-path = "serial0:115200n8"; 34 gpio-keys { 35 compatible = "gpio-keys"; 68 regulator-us [all...] |