| /freebsd-src/sys/contrib/dev/iwlwifi/fw/api/ |
| H A D | nvm-reg.h | 1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2012-2014, 2018-2024 Intel Corporation
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5 * Copyright (C) 2016-2017 Intel Deutschland GmbH
11 * enum iwl_regulatory_and_nvm_subcmd_ids - regulator
134 __le32 reserved; global() member
215 __le16 reserved; global() member
263 __le32 reserved; global() member
281 u8 reserved; global() member
321 __le32 channels[]; global() member
348 u8 reserved[3]; global() member
350 __le32 channels[]; global() member
379 u8 reserved[3]; global() member
381 __le32 channels[]; global() member
474 u8 reserved; global() member
[all...] |
| H A D | scan.h | 1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2012-2014, 2018-2024 Intel Corporation
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5 * Copyright (C) 2016-2017 Intel Deutschland GmbH
13 * enum iwl_scan_subcmd_ids - sca
122 u8 reserved[2]; global() member
142 u8 reserved[2]; global() member
201 u8 reserved[3]; global() member
434 __le32 reserved; global() member
593 u8 reserved; global() member
769 u8 reserved; global() member
776 __le16 reserved; global() member
795 __le16 reserved; global() member
810 __le16 reserved; global() member
848 u8 reserved; global() member
941 u8 reserved; global() member
961 __le16 reserved; global() member
986 u8 reserved; global() member
1037 u8 reserved; global() member
1061 __le16 reserved; global() member
1143 __le32 reserved; global() member
1161 __le16 reserved; global() member
1189 __le16 reserved; global() member
1205 __le16 reserved; global() member
1233 __le16 reserved; global() member
[all...] |
| H A D | rfi.h | 1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2020-2021, 2023 Intel Corporation
13 * struct iwl_rfi_lut_entry - an entry in the RFI frequency LUT.
16 * @channels: channels that can be interfered at frequency freq (at most 15)
21 u8 channels[IWL_RFI_LUT_ENTRY_CHANNELS_NU member
34 u8 reserved[3]; global() member
[all...] |
| /freebsd-src/sys/contrib/device-tree/Bindings/dma/ |
| H A D | ingenic,dma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Paul Cercueil <paul@crapouillou.net>
13 - $ref: dma-controller.yaml#
18 - enum:
19 - ingenic,jz4740-dma
20 - ingenic,jz4725b-dma
21 - ingenic,jz4755-dma
22 - ingenic,jz4760-dma
[all …]
|
| H A D | ti-edma.txt | 8 ------------------------------------------------------------------------------
12 --------------------
13 - compatible: Should be:
14 - "ti,edma3-tpcc" for the channel controller(s) on OMAP,
16 - "ti,k2g-edma3-tpcc", "ti,edma3-tpcc" for the
18 - #dma-cells: Should be set to <2>. The first number is the DMA request
20 - reg: Memory map of eDMA CC
21 - reg-names: "edma3_cc"
22 - interrupts: Interrupt lines for CCINT, MPERR and CCERRINT.
23 - interrupt-names: "edma3_ccint", "edma3_mperr" and "edma3_ccerrint"
[all …]
|
| H A D | brcm,bcm2835-dma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/brcm,bcm2835-dma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Nicolas Saenz Julienne <nsaenz@kernel.org>
13 The BCM2835 DMA controller has 16 channels in total. Only the lower
14 13 channels have an associated IRQ. Some arbitrary channels are used by the
15 VideoCore firmware (1,3,6,7 in the current firmware version). The channels
19 - $ref: dma-controller.yaml#
23 const: brcm,bcm2835-dma
[all …]
|
| H A D | dma-common.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/dma/dma-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vinod Koul <vkoul@kernel.org>
20 "#dma-cells":
27 dma-channel-mask:
29 Bitmask of available DMA channels in ascending order that are
30 not reserved by firmware and are available to the
32 The first item in the array is for channels 0-31, the second is for
[all …]
|
| H A D | fsl-mxs-dma.txt | 4 - compatible : Should be "fsl,<chip>-dma-apbh" or "fsl,<chip>-dma-apbx"
5 - reg : Should contain registers location and length
6 - interrupts : Should contain the interrupt numbers of DMA channels.
7 If a channel is empty/reserved, 0 should be filled in place.
8 - #dma-cells : Must be <1>. The number cell specifies the channel ID.
9 - dma-channels : Number of channels supported by the DMA controller
12 - interrupt-names : Name of DMA channel interrupts
19 dma_apbh: dma-apbh@80004000 {
20 compatible = "fsl,imx28-dma-apbh";
26 interrupt-names = "ssp0", "ssp1", "ssp2", "ssp3",
[all …]
|
| /freebsd-src/sys/contrib/device-tree/Bindings/iio/adc/ |
| H A D | cc10001_adc.txt | 1 * Cosmic Circuits - Analog to Digital Converter (CC-10001-ADC)
4 - compatible: Should be "cosmic,10001-adc"
5 - reg: Should contain adc registers location and length.
6 - clock-names: Should contain "adc".
7 - clocks: Should contain a clock specifier for each entry in clock-names
8 - vref-supply: The regulator supply ADC reference voltage.
11 - adc-reserved-channels: Bitmask of reserved channels,
12 i.e. channels that cannot be used by the OS.
16 compatible = "cosmic,10001-adc";
18 adc-reserved-channels = <0x2>;
[all …]
|
| H A D | cosmic,10001-adc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/cosmic,10001-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Cosmic Circuits CC-10001 ADC
10 - Jonathan Cameron <jic23@kernel.org>
13 Cosmic Circuits 10001 10-bit ADC device.
17 const: cosmic,10001-adc
22 adc-reserved-channels:
25 Bitmask of reserved channels, i.e. channels that cannot be
[all …]
|
| H A D | st,stm32-adc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/st,stm32-adc.yaml#
5 $schema: http://devicetree.org/meta-schema
[all...] |
| /freebsd-src/tools/tools/ath/athrd/ |
| H A D | athrd.1 | 1 .\"-
2 .\" Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
3 .\" All rights reserved.
34 .Nd list channels and transmit power for a country/regulatory domain
53 .Bl -tag -width indent
57 will display B channels only if they are not also marked as available for
58 use as G channels and similary for A and T channels.
61 will list all channels.
63 Calculate channels not assuming extended channel mode.
65 Enabling debugging in the HAL code that calculates the available channels
[all …]
|
| /freebsd-src/sys/dev/ath/ath_hal/ |
| H A D | ah_regdomain.h | 1 /*-
2 * SPDX-License-Identifier: ISC
4 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
5 * Copyright (c) 2005-2006 Atheros Communications, Inc.
6 * All rights reserved.
105 a one-on-one mapping exists */
118 * 1/2 and 1/4 rate channels into a separate table).
147 chanbmask_t chan11a; /* 11a channels */
148 chanbmask_t chan11a_turbo; /* 11a static turbo channels */
149 chanbmask_t chan11a_dyn_turbo; /* 11a dynamic turbo channels */
[all …]
|
| /freebsd-src/usr.sbin/bhyve/ |
| H A D | audio.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
5 * All rights reserved.
65 * audio_init - initialize an instance of audio player
66 * @dev_name - the backend sound device used to play / capture
67 * @dir - dir = 1 for write mode, dir = 0 for read mode
92 if (nlen < sizeof(aud->dev_name)) in audio_init()
93 memcpy(aud->dev_name, dev_name, nlen + 1); in audio_init()
100 aud->dir = dir; in audio_init()
102 aud->fd = open(aud->dev_name, aud->dir ? O_WRONLY : O_RDONLY, 0); in audio_init()
[all …]
|
| /freebsd-src/share/man/man4/ |
| H A D | snd_hdspe.4 | 2 .\" All rights reserved.
34 .Bd -ragged -offset indent
42 .Bd -literal -offset indent
56 .Bl -bullet -compact
58 RME HDSPe AIO (optional AO4S-192 and AI4S-192 extension boards)
67 The effective number of ADAT channels i
[all...] |
| H A D | pcm.4 | 2 .\" Copyright (c) 2009-2011 Joel Dahl <joel@FreeBSD.org>
3 .\" All rights reserved.
39 .Bd -ragged -offset indent
60 driver are: multichannel audio, per-application
61 volume control, dynamic mixing through virtual sound channels, true full
74 .Bl -bullet -compact
118 .Xr snd_uaudio 4 (auto-loaded on device plug)
145 .Bl -tag -width ".Va snd_driver_load" -offset indent
164 To define default values for the different mixer channels,
174 multichannel matrix processor supports up to 18 interleaved channels, but the
[all …]
|
| H A D | snd_hdsp.4 | 3 .\" All rights reserved.
35 .Bd -ragged -offset indent
43 .Bd -literal -offset indent
57 .Bl -bullet -compact
59 RME HDSP 9632 (optional AO4S-192 and AIS-192 extension boards)
68 The effective number of ADAT channels i
[all...] |
| /freebsd-src/sys/dev/sound/pcm/ |
| H A D | feeder_volume.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2005-2009 Ariff Abdullah <ariff@FreeBSD.org>
5 * All rights reserved.
54 uint32_t channels, uint8_t *dst, uint32_t count) \
60 dst += count * PCM_##BIT##_BPS * channels; \
62 i = channels; \
64 dst -= PCM_##BIT##_BPS; \
65 i--; \
71 } while (--count != 0); \
[all …]
|
| H A D | matrix_map.h | |
| H A D | feeder_format.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2008-2009 Ariff Abdullah <ariff@FreeBSD.org>
5 * All rights reserved.
30 * feeder_format: New generation of generic, any-to-any format converter, as
50 uint32_t ialign, oalign, channels;
54 uint32_t ialign, oalign, channels; global() member
[all...] |
| /freebsd-src/sys/contrib/device-tree/Bindings/crypto/ |
| H A D | fsl-sec2.txt | 1 Freescale SoC SEC Security Engines versions 1.x-2.x-3.x
5 - compatible : Should contain entries for this and backward compatible
9 - reg : Offset and length of the register set for the device
10 - interrupts : the SEC's interrupt number
11 - fsl,num-channels : An integer representing the number of channels
13 - fsl,channel-fifo-len : An integer representing the number of
15 - fsl,exec-units-mask : The bitmask representing what execution units
16 (EUs) are available. It's a single 32-bit cell. EU information
20 bit 0 = reserved - should be 0
23 bit 3 = set if SEC has the message digest EU (MDEU/MDEU-A)
[all …]
|
| /freebsd-src/usr.sbin/bluetooth/l2control/ |
| H A D | l2cap.c | 1 /*-
4 * SPDX-License-Identifier: BSD-2-Clause
6 * Copyright (c) 2001-2002 Maksim Yevmenkin <m_evmenkin@yahoo.com>
7 * All rights reserved.
61 strlcpy(str, he->h_name, sizeof(str)); in bdaddrpr()
162 "%-17.17s " \ in l2cap_read_connection_list()
203 r.channels = calloc(NG_L2CAP_MAX_CHAN_NUM, in l2cap_read_channel_list()
205 if (r.channels == NULL) { in l2cap_read_channel_list()
215 fprintf(stdout, "L2CAP channels:\n"); in l2cap_read_channel_list()
220 "%-17.17s " \ in l2cap_read_channel_list()
[all …]
|
| /freebsd-src/share/man/man4/man4.arm/ |
| H A D | bcm283x_pwm.4 | 2 .\" SPDX-License-Identifier: BSD-2-Clause
4 .\" Copyright (c) 2017 Poul-Henning Kamp <phk@FreeBSD.org>
5 .\" All rights reserved.
32 .Nd bcm283x_pwm - driver for Raspberry Pi 2/3 PWM
44 .Bd -literal
55 .Bl -tag -width ".Va dev.pwm"
57 PWM Mode for channels 1 and 2.
59 The N/M mode is a first order delta-sigma mode, which makes a quite
64 Applies to both channels 1 and 2.
80 The "on" period in cycles for PWM channels 1 and 2.
[all …]
|
| /freebsd-src/sys/contrib/xen/io/ |
| H A D | sndif.h | 4 * Unified sound-device I/O interface for Xen guest OSes.
24 * Copyright (C) 2013-2015 GlobalLogic Inc.
25 * Copyright (C) 2016-2017 EPAM Systems Inc.
51 * Front->back notifications: when enqueuing a new request, sending a
53 * hold-off mechanism provided by the ring macros). Backends must set
56 * Back->front notifications: when enqueuing a new response, sending a
58 * hold-off mechanism provided by the ring macros). Frontends must set
61 * The two halves of a para-virtual sound card driver utilize nodes within
75 * Note: depending on the use-case backend can expose more sound cards and
77 * SW mixers, configuring virtual sound streams, channels etc.
[all …]
|
| /freebsd-src/sys/contrib/device-tree/src/arm/aspeed/ |
| H A D | aspeed-bmc-ampere-mtjade.dts | 1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
3 #include "aspeed-g5.dtsi"
4 #include <dt-bindings/gpio/aspeed-gpio.h>
8 compatible = "ampere,mtjade-bmc", "aspeed,ast2500";
12 * i2c bus 50-57 assigned to NVMe slot 0-
[all...] |