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/freebsd-src/sys/contrib/device-tree/Bindings/interrupt-controller/
H A Drenesas,rza1-irqc.txt3 The RZ/A1 Interrupt Controller is a front-end for the GIC found on Renesas
5 - IRQ sense select for 8 external interrupts, 1:1-mapped to 8 GIC SPI
7 - NMI edge select.
10 - compatible: Must be "renesas,<soctype>-irqc", and "renesas,rza1-irqc" as
13 - "renesas,r7s72100-irqc" (RZ/A1H)
14 - "renesas,r7s9210-irqc" (RZ/A2M)
15 - #interrupt-cells: Must be 2 (an interrupt index and flags, as defined
17 - #address-cells: Must be zero
18 - interrupt-controller: Marks the device as an interrupt controller
19 - reg: Base address and length of the memory resource used by the interrupt
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H A Drenesas,rza1-irqc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/renesas,rza1-irqc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chris Brandt <chris.brandt@renesas.com>
11 - Geert Uytterhoeven <geert+renesas@glider.be>
14 The RZ/A1 Interrupt Controller is a front-end for the GIC found on Renesas RZ/A1 and
16 - IRQ sense select for 8 external interrupts, 1:1-mapped to 8 GIC SPI interrupts,
17 - NMI edge select.
20 - $ref: /schemas/interrupt-controller.yaml#
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/freebsd-src/sys/contrib/device-tree/src/arm/renesas/
H A Dr7s72100.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the r7s72100 SoC
5 * Copyright (C) 2013-14 Renesas Solutions Corp.
6 * Copyright (C) 2014 Wolfram Sang, Sang Engineering <wsa@sang-engineering.com>
9 #include <dt-bindings/clock/r7s72100-clock.h>
10 #include <dt-binding
689 irqc: interrupt-controller@fcfef800 { global() label
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H A Dr7s72100-rskrza1.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
9 #include "r7s72100.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/pinctrl/r7s72100-pinctrl.h>
16 compatible = "renesas,rskrza1", "renesas,r7s72100";
24 stdout-path = "serial0:115200n8";
33 compatible = "mtd-rom";
36 power-domains = <&cpg_clocks>;
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