Searched +full:ppmu +full:- +full:event (Results 1 – 13 of 13) sorted by relevance
| /freebsd-src/sys/contrib/device-tree/Bindings/devfreq/event/ |
| H A D | samsung,exynos-ppmu.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/devfreq/event/samsung,exynos-ppmu.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Samsung Exynos SoC PPMU (Platform Performance Monitoring Unit) 10 - Chanwoo Choi <cw00.choi@samsung.com> 11 - Krzysztof Kozlowski <krzk@kernel.org> 14 The Samsung Exynos SoC has PPMU (Platform Performance Monitoring Unit) for 15 each IP. PPMU provides the primitive values to get performance data. These 16 PPMU events provide information of the SoC's behaviors so that you may use to [all …]
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| H A D | exynos-ppmu.txt | 2 * Samsung Exynos PPMU (Platform Performance Monitoring Unit) device 4 The Samsung Exynos SoC has PPMU (Platform Performance Monitoring Unit) for 5 each IP. PPMU provides the primitive values to get performance data. These 6 PPMU events provide information of the SoC's behaviors so that you may 9 The Exynos PPMU driver uses the devfreq-event class to provide event data 10 to various devfreq devices. The devfreq devices would use the event data when 13 Required properties for PPMU device: 14 - compatible: Should be "samsung,exynos-ppmu" or "samsung,exynos-ppmu-v2. 15 - reg: physical base address of each PPMU and length of memory mapped region. 17 Optional properties for PPMU device: [all …]
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| /freebsd-src/sys/contrib/device-tree/src/arm/samsung/ |
| H A D | exynos4412-ppmu-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device tree sources for Exynos4412 PPMU common device tree 13 ppmu_dmc0_3: ppmu-event3-dmc0 { 14 event-name = "ppmu-event3-dmc0"; 23 ppmu_dmc1_3: ppmu-event3-dmc1 { 24 event-name = "ppmu-event3-dmc1"; 33 ppmu_leftbus_3: ppmu-event3-leftbus { 34 event-name = "ppmu-event3-leftbus"; 43 ppmu_rightbus_3: ppmu-event3-rightbus { 44 event-name = "ppmu-event3-rightbus";
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| H A D | exynos5420.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 14 #include <dt-bindings/clock/exynos5420.h> 15 #include <dt-bindings/clock/exynos-audss-clk.h> 16 #include <dt-bindings/interrupt-controller/arm-gi [all...] |
| H A D | exynos4210-i9100.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Samsung's Exynos4210 based Galaxy S2 (GT-I9100 version) device tree 11 /dts-v1/; 13 #include "exynos4412-ppmu-common.dtsi" 15 #include <dt-bindings/gpio/gpio.h> 16 #include <dt-bindings/input/linux-event-codes.h> 19 model = "Samsung Galaxy S2 (GT-I9100)"; 21 chassis-type = "handset"; 35 stdout-path = "serial2:115200n8"; 38 vemmc_reg: regulator-0 { [all …]
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| H A D | exynos4412-p4note.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 4 * Based on exynos4412-midas.dtsi. 10 /dts-v1/; 12 #include "exynos4412-ppmu-common.dtsi" 14 #include <dt-bindings/clock/maxim,max77686.h> 15 #include <dt-binding [all...] |
| /freebsd-src/sys/contrib/device-tree/Bindings/memory-controllers/ |
| H A D | exynos5422-dmc.txt | 6 runtime, the driver uses the PPMU (Platform Performance Monitoring Unit), which 12 - compatible: Should be "samsung,exynos5422-dmc". 13 - clocks : list of clock specifiers, must contain an entry for each 14 required entry in clock-names for CLK_FOUT_SPLL, CLK_MOUT_SCLK_SPLL, 17 - clock-names : should include "fout_spll", "mout_sclk_spll", "ff_dout_spll2", 20 - devfreq-events : phandles for PPMU devices connected to this DMC. 21 - vdd-supply : phandle for voltage regulator which is connected. 22 - reg : registers of two CDREX controllers. 23 - operating-points-v2 : phandle for OPPs described in v2 definition. 24 - device-handle : phandle of the connected DRAM memory device. For more [all …]
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| H A D | samsung,exynos5422-dmc.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/memory-controllers/samsung,exynos5422-dmc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 12 - Krzysztof Kozlowski <krzk@kernel.org> 13 - Lukasz Luba <lukasz.luba@arm.com> 19 controller in runtime, the driver uses the PPMU (Platform Performance 27 - const: samsung,exynos5422-dmc 29 clock-names: 31 - const: fout_spll [all …]
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| /freebsd-src/sys/contrib/device-tree/Bindings/interconnect/ |
| H A D | samsung,exynos-bus.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/interconnect/samsung,exynos-bus.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chanwoo Choi <cw00.choi@samsung.com> 11 - Krzysztof Kozlowski <krzk@kernel.org> 15 sub-blocks in SoC. Most Exynos SoCs share the common architecture for buses. 18 monitor the usage of each bus in runtime, the driver uses the PPMU (Platform 20 sub-blocks. 22 The Exynos SoC includes the various sub-blocks which have the each AXI bus. [all …]
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| /freebsd-src/sys/contrib/device-tree/include/dt-bindings/pmu/ |
| H A D | exynos_ppmu.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 3 * Samsung Exynos PPMU event types for counting in regs
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| /freebsd-src/lib/libpmc/pmu-events/ |
| H A D | jevents.c | 1 /* Parse event JSON files */ 20 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 50 #include "pmu-events.h" 66 char *event; member 88 return -1; in convert() 103 free(et->soc_id); in free_sys_event_tables() 147 strncat(*dst, map + bt->start, blen); in addfield() 161 --e; in fixdesc() 163 --e; in fixdesc() 221 for (i = newval->start; i < newval->end; i++) { in cut_comma() [all …]
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| /freebsd-src/sys/contrib/device-tree/src/arm64/exynos/ |
| H A D | exynos5433-tm2-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 11 /dts-v1/; 13 #include <dt-bindings/clock/samsung,s2mps11.h> 14 #include <dt-bindings/gpio/gpio.h> 15 #include <dt-bindings/input/input.h> 16 #include <dt-bindings/interrupt-controller/irq.h> 17 #include <dt-bindings/sound/samsung-i2s.h> 48 stdout-path = &serial_1; 56 gpio-keys { 57 compatible = "gpio-keys"; [all …]
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| /freebsd-src/sys/contrib/device-tree/Bindings/devfreq/ |
| H A D | exynos-bus.txt | 4 and sub-blocks in SoC. Most Exynos SoCs share the common architecture 8 the driver uses the PPMU (Platform Performance Monitoring Unit), which 9 is able to measure the current load of sub-blocks. 11 The Exynos SoC includes the various sub-blocks which have the each AXI bus. 13 power line. The power line might be shared among one more sub-blocks. 14 So, we can divide into two type of device as the role of each sub-block. 16 - parent bus device 17 - passive bus device 26 VDD_xxx |--- A block (parent) 27 |--- B block (passive) [all …]
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