| /freebsd-src/sys/contrib/device-tree/src/arm64/apple/ |
| H A D | t8103-pmgr.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 * PMGR Power domains for the Apple T8103 "M1" SoC
10 ps_sbr: power-controller@100 {
11 compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
13 #power-domain-cells = <0>;
14 #reset-cells = <0>;
16 apple,always-on; /* Core device */
19 ps_aic: power-controller@108 {
20 compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
22 #power-domain-cells = <0>;
[all …]
|
| H A D | t8112-pmgr.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 * PMGR Power domains for the Apple T8112 "M2" SoC
10 ps_sbr: power-controller@100 {
11 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
13 #power-domain-cells = <0>;
14 #reset-cells = <0>;
16 apple,always-on; /* Core device */
19 ps_aic: power-controller@108 {
20 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
22 #power-domain-cells = <0>;
[all …]
|
| H A D | t600x-pmgr.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 * PMGR Power domains for the Apple T6001 "M1 Max" SoC
9 DIE_NODE(ps_pms_bridge): power-controller@100 {
10 compatible = "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate";
12 #power-domain-cells = <0>;
13 #reset-cells = <0>;
15 apple,always-on; /* Core device */
18 DIE_NODE(ps_aic): power-controller@108 {
19 compatible = "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate";
21 #power-domain-cells = <0>;
[all …]
|
| /freebsd-src/sys/contrib/device-tree/Bindings/soc/rockchip/ |
| H A D | power_domain.txt | 1 * Rockchip Power Domains
3 Rockchip processors include support for multiple power domains which can be
4 powered up/down by software based on different application scenes to save power.
6 Required properties for power domain controller:
7 - compatible: Should be one of the following.
8 "rockchip,px30-power-controller" - for PX30 SoCs.
9 "rockchip,rk3036-power-controller" - for RK3036 SoCs.
10 "rockchip,rk3066-power-controller" - for RK3066 SoCs.
11 "rockchip,rk3128-power-controller" - for RK3128 SoCs.
12 "rockchip,rk3188-power-controller" - for RK3188 SoCs.
[all …]
|
| /freebsd-src/sys/contrib/device-tree/Bindings/power/ |
| H A D | rockchip,power-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/rockchip,power-controller
[all...] |
| H A D | power-domain.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/power-domain.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rafael J. Wysocki <rjw@rjwysocki.net>
11 - Kevin Hilman <khilman@kernel.org>
12 - Ulf Hansson <ulf.hansson@linaro.org>
16 used for power gating of selected IP blocks for power saving by reduced
25 \#power-domain-cells property in the PM domain provider node.
29 pattern: "^(power-controller|power-domain|performance-domain)([@-].*)?$"
[all …]
|
| H A D | mediatek,power-controller.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/mediatek,power-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Mediatek Power Domains Controller
10 - MandyJH Liu <mandyjh.liu@mediatek.com>
11 - Matthias Brugger <mbrugger@suse.com>
14 Mediatek processors include support for multiple power domains which can be
15 powered up/down by software based on different application scenes to save power.
17 IP cores belonging to a power domain should contain a 'power-domains'
[all …]
|
| H A D | brcm,bcm63xx-power.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/brcm,bcm63xx-power.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: BCM63xx power domain driver
10 - Álvaro Fernández Rojas <noltari@gmail.com>
13 BCM6318, BCM6328, BCM6362 and BCM63268 SoCs have a power domain controller
14 to enable/disable certain components in order to save power.
19 - enum:
20 - brcm,bcm6318-power-controller
[all …]
|
| H A D | fsl,imx-gpcv2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/fsl,imx-gpcv2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale i.MX General Power Controller v2
10 - Andrey Smirnov <andrew.smirnov@gmail.com>
13 The i.MX7S/D General Power Control (GPC) block contains Power Gating
14 Control (PGC) for various power domains.
16 Power domains contained within GPC node are generic power domain
18 Documentation/devicetree/bindings/power/power-domain.yaml, which are
[all …]
|
| H A D | fsl,imx-gpc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/fsl,imx-gpc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale i.MX General Power Controller
10 - Philipp Zabel <p.zabel@pengutronix.de>
13 The i.MX6 General Power Control (GPC) block contains DVFS load tracking
14 counters and Power Gating Control (PGC).
16 The power domains are generic power domain providers as documented in
17 Documentation/devicetree/bindings/power/power-domain.yaml. They are
[all …]
|
| H A D | power_domain.txt | 4 used for power gating of selected IP blocks for power saving by reduced leakage
12 #power-domain-cells property in the PM domain provider node.
16 See power-domain.yaml.
21 - power-domains : A list of PM domain specifiers, as defined by bindings of
22 the power controller that is the PM domain provider.
25 - power-domain-names : A list of power domain name strings sorted in the same
26 order as the power-domains property. Consumers drivers will use
27 power-domain-names to match power domains with power-domains
32 leaky-device@12350000 {
33 compatible = "foo,i-leak-current";
[all …]
|
| /freebsd-src/sys/dev/sfxge/common/ |
| H A D | efx_regs_mcdi_strs.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright 2008-2018 Solarflare Communications Inc. All rights reserved.
31 * rebuild this file with "make -C doc mcdiheaders".
39 #define MC_CMD_SENSOR_CONTROLLER_TEMP_ENUM_STR "Controller temperature: degC"
41 #define MC_CMD_SENSOR_CONTROLLER_COOLING_ENUM_STR "Controller cooling: bool"
46 #define MC_CMD_SENSOR_IN_1V0_ENUM_STR "1.0v power: mV"
47 #define MC_CMD_SENSOR_IN_1V2_ENUM_STR "1.2v power: mV"
48 #define MC_CMD_SENSOR_IN_1V8_ENUM_STR "1.8v power: mV"
49 #define MC_CMD_SENSOR_IN_2V5_ENUM_STR "2.5v power: mV"
[all …]
|
| /freebsd-src/sys/contrib/device-tree/Bindings/arm/apple/ |
| H A D | apple,pmgr.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Apple SoC Power Manager (PMGR)
10 - Hector Martin <marcan@marcan.st>
13 Apple SoCs include PMGR blocks responsible for power management,
14 which can control various clocks, resets, power states, and
16 with sub-nodes representing individual features.
20 pattern: "^power-management@[0-9a-f]+$"
24 - enum:
[all …]
|
| /freebsd-src/sys/contrib/device-tree/Bindings/ |
| H A D | trivial-devices.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/trivial-devices.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
27 spi-ma
[all...] |
| /freebsd-src/sys/contrib/device-tree/src/arm64/freescale/ |
| H A D | imx8-ss-lsio.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018-2020 NXP
7 #include <dt-bindings/clock/imx8-lpcg.h>
8 #include <dt-bindings/firmware/imx/rsrc.h>
10 lsio_bus_clk: clock-lsio-bus {
11 compatible = "fixed-cloc
[all...] |
| /freebsd-src/sys/contrib/device-tree/Bindings/soc/ti/ |
| H A D | sci-pm-domain.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/ti/sci-p
[all...] |
| /freebsd-src/sys/contrib/device-tree/src/arm/renesas/ |
| H A D | r8a7792.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car V2H (R8A77920) SoC
8 #include <dt-bindings/clock/r8a7792-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/ir
[all...] |
| /freebsd-src/sys/contrib/device-tree/Bindings/clock/ |
| H A D | exynos5433-clock.txt | 3 The Exynos5433 clock controller generates and supplies clock to various
8 - compatible: should be one of the following.
9 - "samsung,exynos5433-cmu-top" - clock controller compatible for CMU_TOP
12 - "samsung,exynos5433-cmu-cpif" - clock controller compatible for CMU_CPIF
14 - "samsung,exynos5433-cmu-mif" - clock controller compatible for CMU_MIF
15 which generates clocks for DRAM Memory Controller domain.
16 - "samsung,exynos5433-cmu-peric" - clock controller compatible for CMU_PERIC
18 - "samsung,exynos5433-cmu-peris" - clock controller compatible for CMU_PERIS
20 - "samsung,exynos5433-cmu-fsys" - clock controller compatible for CMU_FSYS
22 - "samsung,exynos5433-cmu-g2d" - clock controller compatible for CMU_G2D
[all …]
|
| /freebsd-src/sys/contrib/device-tree/Bindings/display/tegra/ |
| H A D | nvidia,tegra20-host1x.txt | 4 - compatible: "nvidia,tegra<chip>-host1x"
5 - reg: Physical base address and length of the controller's registers.
6 For pre-Tegra186, one entry describing the whole register area.
7 For Tegra186, one entry for each entry in reg-names:
8 "vm" - VM region assigned to Linux
9 "hypervisor" - Hypervisor region (only if Linux acts as hypervisor)
10 - interrupts: The interrupt outputs from the controller.
11 - #address-cells: The number of cells used to represent physical base addresses
13 - #size-cells: The number of cells used to represent the size of an address
15 - ranges: The mapping of the host1x address space to the CPU address space.
[all …]
|
| /freebsd-src/sys/contrib/device-tree/Bindings/usb/ |
| H A D | nvidia,tegra124-xusb.txt | 1 NVIDIA Tegra xHCI controller
4 The Tegra xHCI controller supports both USB2 and USB3 interfaces exposed by
5 the Tegra XUSB pad controller.
8 --------------------
9 - compatible: Must be:
10 - Tegra124: "nvidia,tegra124-xusb"
11 - Tegra132: "nvidia,tegra132-xusb", "nvidia,tegra124-xusb"
12 - Tegra210: "nvidia,tegra210-xusb"
13 - Tegra186: "nvidia,tegra186-xusb"
14 - reg: Must contain the base and length of the xHCI host registers, XUSB FPCI
[all …]
|
| /freebsd-src/sys/contrib/device-tree/Bindings/soc/bcm/ |
| H A D | brcm,bcm2835-pm.txt | 1 BCM2835 PM (Power domains, watchdog)
3 The PM block controls power domains and some reset lines, and includes
4 a watchdog timer. This binding supersedes the brcm,bcm2835-pm-wdt
9 - compatible: Should be "brcm,bcm2835-pm"
10 - reg: Specifies base physical address and size of the two
13 - clocks: a) v3d: The V3D clock from CPRMAN
17 - #reset-cells: Should be 1. This property follows the reset controller
19 - #power-domain-cells: Should be 1. This property follows the power domain
24 - timeout-sec: Contains the watchdog timeout in seconds
25 - system-power-controller: Whether the watchdog is controlling the
[all …]
|
| /freebsd-src/sys/contrib/device-tree/Bindings/nvme/ |
| H A D | apple,nvme-ans.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/nvme/apple,nvme-ans.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Apple ANS NVM Express host controller
10 - Sven Peter <sven@svenpeter.dev>
15 - enum:
16 - apple,t8103-nvme-ans2
17 - apple,t8112-nvme-ans2
18 - apple,t6000-nvme-ans2
[all …]
|
| /freebsd-src/sys/contrib/device-tree/Bindings/interrupt-controller/ |
| H A D | fsl,mu-msi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/fsl,mu-msi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale/NXP i.MX Messaging Unit (MU) work as msi controller
10 - Frank Li <Frank.Li@nxp.com>
23 registers (Processor A-side, Processor B-side).
25 MU can work as msi interrupt controller to do doorbell
28 - $ref: /schemas/interrupt-controller/msi-controller.yaml#
33 - fsl,imx6sx-mu-msi
[all …]
|
| /freebsd-src/sys/contrib/device-tree/Bindings/mfd/ |
| H A D | max77620.txt | 1 MAX77620 Power management IC from Maxim Semiconductor.
4 -------------------
5 - compatible: Must be one of
9 - reg: I2C device address.
12 -------------------
13 - interrupts: The interrupt on the parent the controller is
15 - interrupt-controller: Marks the device node as an interrupt controller.
16 - #interrupt-cells: is <2> and their usage is compliant to the 2 cells
17 variant of <../interrupt-controller/interrupts.txt>
19 are defined at dt-bindings/mfd/max77620.h.
[all …]
|
| /freebsd-src/sys/contrib/device-tree/src/arm/aspeed/ |
| H A D | aspeed-bmc-facebook-yosemite4.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later
4 /dts-v1/;
5 #include "aspeed-g6.dtsi"
6 #include <dt-bindings/gpio/aspeed-gpio.h>
7 #include <dt-binding
[all...] |