| /freebsd-src/sys/contrib/openzfs/man/man5/ |
| H A D | vdev_id.conf.5 | 24 while it is mapping a disk device name to an alias.
34 .Bl -tag -width "-h"
41 A defined alias takes precedence over a topology-derived name, but the
49 .Pa /dev/disk/by-vdev .
56 .It Sy channel [ Ns Ar pci_slot ] Ar port Ar name
62 .Pa /dev/by-enclosure
74 .Pa /dev/by-enclosure/ Ns Ao Ar prefix Ac Ns - N
[all...] |
| /freebsd-src/sys/contrib/device-tree/Bindings/sound/ |
| H A D | qcom,wcd938x-sdw.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/qcom,wcd938x-sdw.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
13 Qualcomm WCD9380/WCD9385 Codec is a standalone Hi-Fi audio codec IC.
24 qcom,tx-port-mapping:
26 Specifies static port mapping between slave and master tx ports.
27 In the order of slave port index.
28 $ref: /schemas/types.yaml#/definitions/uint32-array
[all …]
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| /freebsd-src/contrib/ncurses/man/ |
| H A D | tset.1 | 2 .\" Copyright 2018-2023,2024 Thomas E. Dickey *
3 .\" Copyright 1998-2016,2017 Free Software Foundation, Inc. *
31 .TH @TSET@ 1 2024-04-27 "ncurses @NCURSES_MAJOR@.@NCURSES_MINOR@" "User commands"
53 \fB\%@RESET@\fP \-
56 …SET@\fP [\fB\-IQVcqrsw\fP] [\fB\-\fP] [\fB\-e\fP \fIch\fP] [\fB\-i\fP \fIch\fP] [\fB\-k\fP \fIch\f…
58 …SET@\fP [\fB\-IQVcqrsw\fP] [\fB\-\fP] [\fB\-e\fP \fIch\fP] [\fB\-i\fP \fIch\fP] [\fB\-k\fP \fIch\f…
95 If the terminal type was not specified on the command-line, the \fB\-m\fP
97 see subsection \*(``Terminal Type Mapping\*(''.
110 if the \*(``\fB\-w\fP\*('' option is enabled, \fB@TSET@\fP may update
120 if the \*(``\fB\-c\fP\*('' option is enabled,
[all …]
|
| /freebsd-src/sys/contrib/device-tree/Bindings/display/imx/ |
| H A D | ldb.txt | 1 Device-Tree bindings for LVDS Display Bridge (ldb)
6 The LVDS Display Bridge device tree node contains up to two lvds-channel
10 - #address-cells : should be <1>
11 - #size-cells : should be <0>
12 - compatible : should be "fsl,imx53-ldb" or "fsl,imx6q-ldb".
16 - gpr : should be <&gpr> on i.MX53 and i.MX6q.
17 The phandle points to the iomuxc-gpr region containing the LVDS
19 - clocks, clock-names : phandles to the LDB divider and selector clocks and to
21 Documentation/devicetree/bindings/clock/clock-bindings.txt
23 "di0_pll" - LDB LVDS channel 0 mux
[all …]
|
| /freebsd-src/sys/contrib/device-tree/Bindings/display/panel/ |
| H A D | advantech,idk-2121wr.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/panel/advantech,idk-2121wr.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Advantech IDK-2121WR 21.5" Full-HD dual-LVDS panel
10 - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
11 - Thierry Reding <thierry.reding@gmail.com>
14 The IDK-2121WR from Advantech is a Full-HD dual-LVDS panel.
15 A dual-LVDS interface is a dual-link connection with even pixels traveling
18 The panel expects odd pixels on the first port, and even pixels on the
[all …]
|
| H A D | sgd,gktw70sdae4se.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Neil Armstrong <neil.armstrong@linaro.org>
11 - Thierry Reding <thierry.reding@gmail.com>
14 - $ref: panel-common.yaml#
15 - $ref: /schemas/display/lvds.yaml#
24 - compatible
29 - const: sgd,gktw70sdae4se
30 - const: panel-lvds
[all …]
|
| H A D | advantech,idk-1110wr.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/panel/advantech,idk-1110wr.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Advantech IDK-1110WR 10.1" WSVGA LVDS Display Panel
10 - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
11 - Thierry Reding <thierry.reding@gmail.com>
14 - $ref: panel-common.yaml#
15 - $ref: /schemas/display/lvds.yaml#
21 const: advantech,idk-1110wr
[all …]
|
| H A D | mitsubishi,aa121td01.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
11 - Thierry Reding <thierry.reding@gmail.com>
14 - $ref: panel-common.yaml#
15 - $ref: /schemas/display/lvds.yaml#
24 - compatible
29 - const: mitsubishi,aa121td01
30 - const: panel-lvds
[all …]
|
| H A D | mitsubishi,aa104xd12.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
11 - Thierry Reding <thierry.reding@gmail.com>
14 - $ref: panel-common.yaml#
15 - $ref: /schemas/display/lvds.yaml#
24 - compatible
29 - const: mitsubishi,aa104xd12
30 - const: panel-lvds
[all …]
|
| /freebsd-src/sys/contrib/device-tree/Bindings/display/bridge/ |
| H A D | lvds-codec.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/lvds-codec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
16 LVDS is a physical layer specification defined in ANSI/TIA/EIA-64
[all...] |
| /freebsd-src/sys/dev/bhnd/bhndb/ |
| H A D | bhndb.h | 1 /*-
53 BHNDB_REGWIN_T_CORE, /**< Fixed mapping of a core port region. */
54 BHNDB_REGWIN_T_SPROM, /**< Fixed mapping of device SPROM */
60 * Evaluates to true if @p _rt defines a static mapping.
83 /** Core-specific register window (BHNDB_REGWIN_T_CORE). */
87 bhnd_port_type port_type; /**< mapped port type */
88 u_int port; /**< mapped port number */ member
137 * higher-priority requests. */
154 * resource, an in-use resource should be borrowed to fulfill the
158 * during Wi-Fi driver operation on early PCI Wi-Fi devices
[all …]
|
| /freebsd-src/sys/dev/sfxge/common/ |
| H A D | ef10_nic.c | 1 /*-
2 * Copyright (c) 2012-2016 Solarflare Communications Inc.
52 EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON || in efx_mcdi_get_port_assignment()
53 enp->en_family == EFX_FAMILY_MEDFORD || in efx_mcdi_get_port_assignment()
54 enp->en_family == EFX_FAMILY_MEDFORD2); in efx_mcdi_get_port_assignment()
98 EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON || in efx_mcdi_get_port_modes()
99 enp->en_family == EFX_FAMILY_MEDFORD || in efx_mcdi_get_port_modes()
100 enp->en_family == EFX_FAMILY_MEDFORD2); in efx_mcdi_get_port_modes()
161 efx_port_t *epp = &(enp->en_port); in ef10_nic_get_port_mode_bandwidth()
171 /* No port mode info available. */ in ef10_nic_get_port_mode_bandwidth()
[all …]
|
| /freebsd-src/contrib/tcpdump/ |
| H A D | gmpls.c | 18 #include "netdissect-stdinc.h"
38 { GMPLS_PSC1, "Packet-Switch Capable-1"},
39 { GMPLS_PSC2, "Packet-Switch Capable-2"},
40 { GMPLS_PSC3, "Packet-Switch Capable-3"},
41 { GMPLS_PSC4, "Packet-Switch Capable-4"},
42 { GMPLS_L2SC, "Layer-
[all...] |
| /freebsd-src/sys/contrib/device-tree/Bindings/power/supply/ |
| H A D | gpio-charger.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/supply/gpio-charger.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sebastian Reichel <sre@kernel.org>
19 const: gpio-charger
21 charger-type:
23 - unknown
24 - battery
25 - ups
[all …]
|
| /freebsd-src/sys/dev/bhnd/bcma/ |
| H A D | bcma_eromvar.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
51 u_long num_mport; /**< number of master port descriptors */
52 u_long num_dport; /**< number of slave port descriptors */
53 u_long num_mwrap; /**< number of master wrapper slave port descriptors */
54 u_long num_swrap; /**< number of slave wrapper slave port descriptors */
57 /** EROM master port descriptor. */
59 uint8_t port_num; /**< the port number (bus-unique) */
60 uint8_t port_vid; /**< the port VID. A single physical
61 master port may have multiple VIDs;
[all …]
|
| /freebsd-src/sys/contrib/device-tree/Bindings/powerpc/fsl/ |
| H A D | cpus.txt | 13 - fsl,eref-*
19 by the Power ISA. For these EREF-specific categories, the existence of
20 a property named fsl,eref-[CAT], where [CAT] is the abbreviated category
24 - fsl,portid-mapping
27 Definition: The Coherency Subdomain ID Port Mapping Registers and
28 Snoop ID Port Mapping registers, which are part of the CoreNet
30 ID/CoreNet Snoop ID to cpu mapping functions. Certain bits from
|
| H A D | ccf.txt | 5 The CoreNet coherency fabric is a fabric-oriented, connectivity infrastructure
10 - compatible: <string list>
11 fsl,corenet1-cf - CoreNet coherency fabric version 1.
14 fsl,corenet2-cf - CoreNet coherency fabric version 2.
17 fsl,corenet-cf - Used to represent the common registers
22 "fsl,corenet1-cf" or "fsl,corenet2-cf".
24 - reg: <prop-encoded-array>
27 - interrupts: <prop-encoded-array>
28 Interrupt mapping for CCF error interrupt.
30 - fsl,ccf-num-csdids: <u32>
[all …]
|
| /freebsd-src/sys/dev/bhnd/cores/chipc/ |
| H A D | chipc_subr.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
5 * Copyright (c) 2015-2016 Landon Fuller <landon@landonf.org>
40 * Return a human-readable name for the given flash @p type.
150 /* Configure child resource with offset-adjusted values */ in chipc_init_child_resource()
172 * @param port The mapping port number (ignored if not SYS_RES_MEMORY).
173 * @param region The mapping region number (ignored if not SYS_RES_MEMORY).
182 KASSERT(device_get_parent(child) == sc->dev, ("not a direct child")); in chipc_set_irq_resource()
185 /* We currently only support a single IRQ mapping */ in chipc_set_irq_resource()
186 if (dinfo->irq_mapped) { in chipc_set_irq_resource()
[all …]
|
| /freebsd-src/sys/contrib/device-tree/Bindings/gpio/ |
| H A D | nvidia,tegra186-gpio.txt | 31 implemented by the SoC. Each GPIO is assigned to a port, and a port may control
32 a number of GPIOs. Thus, each GPIO is named according to an alphabetical port
33 name and an integer GPIO name within the port. For example, GPIO_PA0, GPIO_PN6,
37 implemented GPIOs within each port varies. GPIO registers within a controller
38 are grouped and laid out according to the port they affect.
40 The mapping from port name to the GPIO controller that implements that port, and
41 the mapping from port name to register offset within a controller, are both
42 extremely non-linear. The header file <dt-bindings/gpio/tegra186-gpio.h>
43 describes the port-level mapping. In that file, the naming convention for ports
52 both the overall controller HW module and the sets-of-ports as "controllers".
[all …]
|
| H A D | nvidia,tegra186-gpio.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/nvidia,tegra186-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
42 implemented by the SoC. Each GPIO is assigned to a port, and a port may
44 alphabetical port name and an integer GPIO name within the port. For
48 of implemented GPIOs within each port varies. GPIO registers within a
49 controller are grouped and laid out according to the port they affect.
[all …]
|
| /freebsd-src/share/man/man4/ |
| H A D | mpr.4 | 4 .\" Copyright (c) 2015-2017 Avago Technologies
5 .\" Copyright (c) 2015-2022 Broadcom Ltd.
45 .Nd "LSI Fusion-MPT 3/3.5 IT/IR 12Gb/s Serial Attached SCSI/SATA/PCIe driver"
49 .Bd -ragged -offset indent
57 .Bd -literal -offset indent
64 Fusion-MPT 3/3.5 IT/IR
72 .Bl -bullet -compact
74 Broadcom Ltd./Avago Tech (LSI) SAS 3004 (4 Port SAS)
76 Broadcom Ltd./Avago Tech (LSI) SAS 3008 (8 Port SAS)
78 Broadcom Ltd./Avago Tech (LSI) SAS 3108 (8 Port SAS)
[all …]
|
| /freebsd-src/sys/contrib/device-tree/Bindings/net/ |
| H A D | cavium-pip.txt | 10 - compatible: "cavium,octeon-3860-pip"
14 - reg: The base address of the PIP's register bank.
16 - #address-cells: Must be <1>.
18 - #size-cells: Must be <0>.
21 - compatible: "cavium,octeon-3860-pip-interface"
25 - reg: The interface number.
27 - #address-cells: Must be <1>.
29 - #size-cells: Must be <0>.
31 Properties for PIP port which is a child the PIP interface:
32 - compatible: "cavium,octeon-3860-pip-port"
[all …]
|
| /freebsd-src/sys/contrib/device-tree/src/arm/nxp/imx/ |
| H A D | imx6q-var-mx6customboard.dts | 1 // SPDX-License-Identifier: GPL-2.0+
3 * Support for Variscite MX6 Carrier-board
9 /dts-v1/;
11 #include "imx6qdl-var-som.dtsi"
12 #include <dt-bindings/pwm/pwm.h>
15 model = "Variscite i.MX6 QUAD/DUAL VAR-SOM-MX6 Custom Board";
16 compatible = "variscite,mx6customboard", "variscite,var-som-imx6q", "fsl,imx6q";
18 panel0: lvds-panel0 {
19 compatible = "panel-lvds";
21 width-mm = <152>;
[all …]
|
| /freebsd-src/sys/contrib/device-tree/Bindings/net/dsa/ |
| H A D | qca8k.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - John Crispin <john@phrozen.org>
13 If the QCA8K switch is connect to an SoC's external mdio-bus, each subnode
14 describing a port needs to have a valid phandle referencing the internal PHY
15 it is connected to. This is because there is no N:N mapping of port and PHY
16 ID. To declare the internal mdio-bus configuration, declare an MDIO node in
17 the switch node and declare the phandle for the port, referencing the internal
18 PHY it is connected to. In this config, an internal mdio-bus is registered and
[all …]
|
| /freebsd-src/sys/contrib/device-tree/Bindings/pci/ |
| H A D | pci.txt | 3 PCI Bus Binding to: IEEE Std 1275-1994
4 https://www.devicetree.org/open-firmware/bindings/pci/pci2_1.pdf
6 And for the interrupt mapping part:
8 Open Firmware Recommended Practice: Interrupt Mapping
9 https://www.devicetree.org/open-firmware/practice/imap/imap0_9d.pdf
14 - linux,pci-domain:
21 - max-link-speed:
27 - reset-gpios:
30 - supports-clkreq:
32 root port to downstream device and host bridge drivers can do programming
[all …]
|