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/freebsd-src/sys/contrib/device-tree/Bindings/mmc/
H A Dmmc-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mmc-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ulf Hansson <ulf.hansson@linaro.org>
25 "#address-cells":
30 "#size-cells":
37 broken-cd:
42 cd-gpios:
47 non-removable:
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/freebsd-src/sys/contrib/device-tree/Bindings/display/panel/
H A Dpanel-common.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/panel/panel-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
24 width-mm:
29 height-mm:
43 non-descriptive information. For instance an LCD panel in a system that
55 panel-timing:
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/freebsd-src/sys/contrib/device-tree/Bindings/media/i2c/
H A Dst,st-vgxy61.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/media/i2c/st,st-vgxy61.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Benjamin Mugnier <benjamin.mugnier@foss.st.com>
12 - Sylvain Petinot <sylvain.petinot@foss.st.com>
14 description: |-
15 STMicroelectronics VGxy61 family has a CSI-2 output port. CSI-2 output is a
17 Supported formats are RAW8, RAW10, RAW12, RAW14 and RAW16.
18 Following part number are supported
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/freebsd-src/sys/contrib/device-tree/Bindings/hwmon/
H A Dadi,ltc2947.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Nuno Sá <nuno.sa@analog.com>
15 https://www.analog.com/media/en/technical-documentation/data-sheets/LTC2947.pdf
20 - adi,ltc2947
33 adi,accumulator-ctl-pol:
35 This property controls the polarity of current that is accumulated to
40 datasheet for more information on the supported options.
41 $ref: /schemas/types.yaml#/definitions/uint32-array
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H A Dg762.txt5 - "compatible": must be either "gmt,g762" or "gmt,g763"
6 - "reg": I2C bus address of the device
7 - "clocks": a fixed clock providing input clock frequency
12 - "fan_startv": fan startup voltage. Accepted values are 0, 1, 2 and 3.
15 - "pwm_polarity": pwm polarity. Accepted values are 0 (positive duty)
18 - "fan_gear_mode": fan gear mode. Supported values are 0, 1 and 2.
21 unmodified (e.g. u-boot installed value).
25 at http://natisbad.org/NAS/refs/GMT_EDS-762_763-080710-0.2.pdf.
30 #address-cells = <1>;
31 #size-cells = <0>;
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/freebsd-src/sys/contrib/device-tree/Bindings/sound/
H A Dnau8825.txt6 - compatible : Must be "nuvoton,nau8825"
8 - reg : the I2C address of the device. This is either 0x1a (CSB=0) or 0x1b (CSB=1).
11 - nuvoton,jkdet-enable: Enable jack detection via JKDET pin.
12 - nuvoton,jkdet-pull-enable: Enable JKDET pin pull. If set - pin pull enabled,
14 - nuvoton,jkdet-pull-up: Pull-up JKDET pin. If set then JKDET pin is pull up, otherwise pull down.
15 - nuvoton,jkdet-polarity: JKDET pin polarity. 0 - active high, 1 - active low.
17 - nuvoton,vref-impedance: VREF Impedance selection
18 0 - Open
19 1 - 25 kOhm
20 2 - 125 kOhm
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H A Dnau8824.txt6 - compatible : Must be "nuvoton,nau8824"
8 - reg : the I2C address of the device. This is either 0x1a (CSB=0) or 0x1b (CSB=1).
11 - nuvoton,jkdet-polarity: JKDET pin polarity. 0 - active high, 1 - active low.
13 - nuvoton,vref-impedance: VREF Impedance selection
14 0 - Open
15 1 - 25 kOhm
16 2 - 125 kOhm
17 3 - 2.5 kOhm
19 - nuvoton,micbias-voltage: Micbias voltage level.
20 0 - VDDA
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H A Dnuvoton,nau8825.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - John Hsu <KCHSU0@nuvoton.com>
13 - $ref: dai-common.yaml#
18 - nuvoton,nau8825
26 nuvoton,jkdet-enable:
31 nuvoton,jkdet-pull-enable:
34 If set - pin pull enabled, otherwise pin in high impedance state.
37 nuvoton,jkdet-pull-up:
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H A Dnuvoton,nau8824.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schema
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/freebsd-src/sys/contrib/device-tree/Bindings/gpio/
H A Dgpio.txt5 -----------------
7 GPIO properties should be named "[<name>-]gpios", with <name> being the purpose
8 of this GPIO for the device. While a non-existent <name> is considered valid
10 for new bindings. Also, GPIO properties named "[<name>-]gpio" are valid and old
11 bindings use it, but are only supported for compatibility reasons and should not
24 and bit-banged data signals:
27 gpio-controller;
28 #gpio-cells = <2>;
32 data-gpios = <&gpio1 12 0>,
44 recommended to use the two-cell approach.
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H A Dgpio-adnp.txt1 Avionic Design N-bit GPIO expander bindings
4 - compatible: should be "ad,gpio-adnp"
5 - reg: The I2C slave address for this device.
6 - interrupts: Interrupt specifier for the controllers interrupt.
7 - #gpio-cells: Should be 2. The first cell is the GPIO number and the
9 - bit 0: polarity (0: normal, 1: inverted)
10 - gpio-controller: Marks the device as a GPIO controller
11 - nr-gpios: The number of pins supported by the controller.
15 Documentation/devicetree/bindings/interrupt-controller/interrupts.txt.
19 gpioext: gpio-controller@41 {
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H A Dgpio-mpc8xxx.txt4 - compatible : Should be "fsl,<soc>-gpio"
5 The following <soc>s are known to be supported:
8 - reg : Address and length of the register set for the device
9 - interrupts : Should be the port interrupt shared by all 32 pins.
10 - #gpio-cells : Should be two. The first cell is the pin number and
11 the second cell is used to specify the gpio polarity:
16 - little-endian : GPIO registers are used as little endian. If not
19 Example of gpio-controller node for a mpc5125 SoC:
22 compatible = "fsl,mpc5125-gpio";
23 #gpio-cells = <2>;
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H A Dbrcm,kona-gpio.txt12 -------------------
14 - compatible: "brcm,bcm11351-gpio", "brcm,kona-gpio"
15 - reg: Physical base address and length of the controller's registers.
16 - interrupts: The interrupt outputs from the controller. There is one GPIO
21 - #gpio-cells: Should be <2>. The first cell is the pin number, the second
23 - bit 0 specifies polarity (0 for normal, 1 for inverted)
24 See also "gpio-specifier" in .../devicetree/bindings/gpio/gpio.txt.
25 - #interrupt-cells: Should be <2>. The first cell is the GPIO number. The
27 supported:
28 - trigger type (bits[1:0]):
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/freebsd-src/sys/contrib/device-tree/Bindings/pinctrl/
H A Dbrcm,iproc-gpio.txt5 - compatible:
6 "brcm,iproc-gpio" for the generic iProc based GPIO controller IP that
7 supports full-featured pinctrl and GPIO functions used in various iProc
10 May contain an SoC-specific compatibility string to accommodate any
11 SoC-specific features
13 "brcm,cygnus-ccm-gpio", "brcm,cygnus-asiu-gpio", or
14 "brcm,cygnus-crmu-gpio" for Cygnus SoCs
16 "brcm,iproc-nsp-gpio" for the iProc NSP SoC that has drive strength support
19 "brcm,iproc-stingray-gpio" for the iProc Stingray SoC that has the general
23 - reg:
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H A Dbrcm,nsp-gpio.txt4 - compatible:
5 Must be "brcm,nsp-gpio-a"
7 - reg:
11 - #gpio-cells:
14 bit[0]: polarity (0 for active high and 1 for active low)
16 - gpio-controller:
19 - ngpios:
20 Number of gpios supported (58x25 supports 32 and 58x23 supports 24)
23 - interrupts:
26 - interrupt-controller:
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/freebsd-src/sys/contrib/dev/acpica/common/
H A Dahpredef.c3 * Module Name: ahpredef - Table of all known ACPI predefined names
11 * Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
28 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent
104 * re-exports any such software from a foreign destination, Licensee shall
105 * ensure that the distribution and export/re-export of the software is in
108 * any of its subsidiaries will export/re-export any technical data, process,
130 * 3. Neither the names of the above-listed copyright holders nor the names
174 AH_PREDEF ("_ACx", "Active Cooling, x=0-
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/freebsd-src/share/man/man9/
H A Dpwmbus.955 The PWMBUS (Pulse-Width Modulation) interface allows a device driver to
63 argument is the duration in nanoseconds of one complete on-off cycle, and the
76 .Bl -tag -width indent
82 if the values are not supported by the controller or
87 Get the number of channels supported by the controller.
99 Set the flags of the channel (such as inverted polarity).
100 If the driver or controller does not support this a do-nothing default method
/freebsd-src/sys/arm/broadcom/bcm2835/
H A Dbcm2835_spi.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
58 {"broadcom,bcm2835-spi", 1},
59 {"brcm,bcm2835-spi", 1},
81 reg--; in bcm_spi_printr()
105 mtx_assert(&sc->sc_mt in bcm_spi_modifyreg()
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/freebsd-src/share/man/man4/
H A Dmx25l.430 .Nd driver for SpiFlash(tm) compatible non-volatile storage devices
35 .Bd -ragged -offset indent
42 .Bd -literal -offset indent
48 driver provides support for the family of non-volatile storage
56 data to determine whether the device is supported.
58 which describes the attributes of each supported device,
60 When a supported device is found, the
72 .Bl -bullet -compact
140 The most commonly-used ones are documented below.
145 .Bl -tag -width indent
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H A Dat45d.430 .Nd driver for DataFlash(tm) non-volatile storage devices
35 .Bd -ragged -offset indent
42 .Bd -literal -offset indent
48 driver provides support for the family of non-volatile storage
59 data to determine whether the device is supported.
61 which describes the attributes of each supported device,
63 When a supported device is found, the
75 .Bl -bullet -compact
107 The most commonly-used ones are documented below.
112 .Bl -tag -width indent
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/freebsd-src/sys/contrib/device-tree/Bindings/media/
H A Dvideo-interfaces.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/video-interfaces.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sakari Ailus <sakari.ailus@linux.intel.com>
11 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
29 #address-cells = <1>;
30 #size-cells = <0>;
45 a common scheme using '#address-cells', '#size-cells' and 'reg' properties is
49 specify #address-cells, #size-cells properties independently for the 'port'
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/freebsd-src/sys/contrib/device-tree/Bindings/interrupt-controller/
H A Dbrcm,bcm6345-l1-intc.txt1 Broadcom BCM6345-style Level 1 interrupt controller
8 - 32, 64 or 128 incoming level IRQ lines
10 - Most onchip peripherals are wired directly to an L1 input
12 - A separate instance of the register set for each CPU, allowing individual
15 - Contains one or more enable/status word pairs per CPU
17 - No atomic set/clear operations
19 - No polarity/level/edge settings
21 - No FIFO or priority encoder logic; software is expected to read all
22 2-4 status words to determine which IRQs are pending
26 - compatible: should be "brcm,bcm<soc>-l1-intc", "brcm,bcm6345-l1-intc"
[all …]
H A Dbrcm,bcm7038-l1-intc.txt1 Broadcom BCM7038-style Level 1 interrupt controller
4 directly to one of the HW INT lines on each CPU. Every BCM7xxx set-top chip
9 - 64, 96, 128, or 160 incoming level IRQ lines
11 - Most onchip peripherals are wired directly to an L1 input
13 - A separate instance of the register set for each CPU, allowing individual
16 - Atomic mask/unmask operations
18 - No polarity/level/edge settings
20 - No FIFO or priority encoder logic; software is expected to read all
21 2-5 status words to determine which IRQs are pending
25 - compatible: should be "brcm,bcm7038-l1-intc"
[all …]
/freebsd-src/sys/dev/acpica/
H A Dacpi_resource.c1 /*-
81 switch (res->Type) { in acpi_lookup_irq_handler()
83 irqnum = res->Data.Irq.InterruptCount; in acpi_lookup_irq_handler()
85 if (res->Data.Irq.Interrupts[i] == req->irq) { in acpi_lookup_irq_handler()
91 trig = res->Data.Irq.Triggering; in acpi_lookup_irq_handler()
92 pol = res->Data.Irq.Polarity; in acpi_lookup_irq_handler()
95 irqnum = res->Data.ExtendedIrq.InterruptCount; in acpi_lookup_irq_handler()
97 if (res->Dat in acpi_lookup_irq_handler()
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/freebsd-src/sys/contrib/device-tree/Bindings/memory-controllers/
H A Dti,gpmc-child.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ti,gpmc-child.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tony Lindgren <tony@atomide.com>
11 - Roger Quadros <rogerq@kernel.org>
18 supported by the respective device.
24 gpmc,sync-clk-ps:
28 # Chip-select signal timings corresponding to GPMC_CONFIG2:
29 gpmc,cs-on-ns:
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