| /freebsd-src/sys/contrib/device-tree/src/arm64/mediatek/ |
| H A D | mt7986a-bananapi-bpi-r3.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 5 * Frank Wunderlich <frank-w@public-files.de> 9 /dts-v1/; 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/input/input.h> 12 #include <dt-bindings/leds/common.h> 13 #include <dt-binding [all...] |
| H A D | mt8183-kukui-jacuzzi-pico6.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 6 /dts-v1/; 7 #include "mt8183-kukui-jacuzzi.dtsi" 8 #include "mt8183-kukui-audio-ts3a227e-max98357 [all...] |
| H A D | mt6795-sony-xperia-m5.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 7 /dts-v1/; 8 #include <dt-bindings/gpio/gpio.h> 14 compatible = "sony,xperia-m5", "mediatek,mt6795"; 15 chassis-type = "handset"; 26 compatible = "led-backlight"; 29 default-brightnes [all...] |
| H A D | mt8395-genio-1200-evk.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 7 /dts-v1/; 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/input/input.h> 13 #include <dt-bindings/interrupt-controller/irq.h> 14 #include <dt-bindings/pinctrl/mt8195-pinfun [all...] |
| H A D | mt8192-asurada.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 6 /dts-v1/; 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/spmi/spmi.h> 25 stdout-path = "serial0:115200n8"; 33 backlight_lcd0: backlight-lcd0 { 34 compatible = "pwm-backlight"; 36 power-suppl [all...] |
| H A D | mt7622-bananapi-bpi-r64.dts | 5 * SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 /dts-v1/; 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/leds/common.h> 17 model = "Bananapi BPI-R64"; 18 chassis-type = "embedded"; 19 compatible = "bananapi,bpi-r6 [all...] |
| H A D | mt8192-asurada-hayato-r1.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 5 /dts-v1/; 6 #include "mt8192-asurada.dtsi" 10 chassis-type = "convertible"; 11 compatible = "google,hayato-rev1", "google,hayato", "mediatek,mt8192"; 15 function-row-physmap = < 43 &pio { [all...] |
| H A D | mt8183-kukui.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 21 stdout-path = "serial0:115200n8"; 25 compatible = "pwm-backlight"; 27 power-supply = <®_vsys>; 28 enable-gpios = <&pio 17 [all...] |
| H A D | mt8365-evk.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (c) 2021-2022 BayLibre, SAS. 10 /dts-v1/; 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/input/input.h> 14 #include <dt-bindings/pinctrl/mt8365-pinfunc.h> 20 compatible = "mediatek,mt8365-ev [all...] |
| H A D | mt8183-kukui-jacuzzi.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 6 #include "mt8183-kukui.dtsi" 7 /* Must come after mt8183-kukui.dtsi to modify cros_ec */ 8 #include <arm/cros-ec-keyboard.dtsi> 11 pp1200_mipibrdg: pp1200-mipibrdg { 12 compatible = "regulator-fixed"; 13 regulator-nam [all...] |
| H A D | mt8195-cherry.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/spmi/spmi.h> 25 backlight_lcd0: backlight-lcd0 { 26 compatible = "pwm-backlight"; 27 brightness-levels = <0 1023>; 28 default-brightness-leve [all...] |
| H A D | mt8195-demo.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 6 /dts-v1/; 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/input/input.h> 13 #include <dt-bindings/pinctrl/mt8195-pinfunc.h> 14 #include <dt-bindings/regulator/mediatek,mt6360-regulato [all...] |
| H A D | mt7622-rfb1.dts | 6 * SPDX-License-Identifier: (GPL-2.0 OR MIT) 9 /dts-v1/; 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/gpio/gpio.h> 18 chassis-type = "embedded"; 19 compatible = "mediatek,mt7622-rfb1", "mediatek,mt7622"; 26 stdout-path = "serial0:115200n8"; 32 proc-suppl [all...] |
| H A D | mt8192-asurada-audio-rt1015p.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/pinctrl/mt8192-pinfunc.h> 10 rt1015p: audio-codec { 12 pinctrl-names = "default"; 13 pinctrl-0 = <&rt1015p_pins>; 14 sdb-gpios = <&pio 147 GPIO_ACTIVE_HIGH>; 15 #sound-dai-cells = <0>; 19 &pio { 20 rt1015p_pins: rt1015p-default-pins { [all …]
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| /freebsd-src/sys/contrib/device-tree/Bindings/pinctrl/ |
| H A D | pinctrl-mt8195.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/pinctrl-mt8195.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sean Wang <sean.wang@mediatek.com> 13 The Mediatek's Pin controller is used to control SoC pins. 17 const: mediatek,mt8195-pinctrl 19 gpio-controller: true 21 '#gpio-cells': 28 gpio-ranges: [all …]
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| H A D | mediatek,mt8195-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt8195-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sean Wang <sean.wang@mediatek.com> 13 The MediaTek's MT8195 Pin controller is used to control SoC pins. 17 const: mediatek,mt8195-pinctrl 19 gpio-controller: true 21 '#gpio-cells': 28 gpio-ranges: [all …]
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| H A D | mediatek,mt8186-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt8186-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sean Wang <sean.wang@mediatek.com> 13 The MediaTek's MT8186 Pin controller is used to control SoC pins. 17 const: mediatek,mt8186-pinctrl 19 gpio-controller: true 21 '#gpio-cells': 28 gpio-ranges: [all …]
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| H A D | pinctrl-mt8186.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/pinctrl-mt8186.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sean Wang <sean.wang@mediatek.com> 13 The Mediatek's Pin controller is used to control SoC pins. 17 const: mediatek,mt8186-pinctrl 19 gpio-controller: true 21 '#gpio-cells': 28 gpio-ranges: [all …]
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| H A D | pinctrl-st.txt | 3 Each multi-function pin is controlled, driven and routed through the 4 PIO multiplexing block. Each pin supports GPIO functionality (ALT0) 5 and multiple alternate functions(ALT1 - ALTx) that directly connect 9 Pull Up (PU) are driven by the related PIO block. 11 ST pinctrl driver controls PIO multiplexing block and also interacts with 14 GPIO bank can have one of the two possible types of interrupt-wirings. 20 | |----> [gpio-bank (n) ] 21 | |----> [gpio-bank (n + 1)] 22 [irqN]-- | irq-mux |----> [gpio-bank (n + 2)] 23 | |----> [gpio-bank (... )] [all …]
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| H A D | mediatek,mt8188-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt8188-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Hui Liu <hui.liu@mediatek.com> 13 The MediaTek's MT8188 Pin controller is used to control SoC pins. 17 const: mediatek,mt8188-pinctrl 19 gpio-controller: true 21 '#gpio-cells': 25 are defined in <dt-bindings/gpio/gpio.h>. [all …]
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| /freebsd-src/sys/contrib/device-tree/src/arm/mediatek/ |
| H A D | mt7629-rfb.dts | 1 // SPDX-License-Identifier: GPL-2.0 7 /dts-v1/; 8 #include <dt-bindings/input/input.h> 13 compatible = "mediatek,mt7629-rfb", "mediatek,mt7629"; 20 stdout-path = "serial0:115200n8"; 23 gpio-keys { 24 compatible = "gpio-keys"; 26 button-reset { 29 gpios = <&pio 60 GPIO_ACTIVE_LOW>; 32 button-wps { [all …]
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| /freebsd-src/sys/contrib/device-tree/src/arm/st/ |
| H A D | stih407-pinctrl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 6 #include "st-pincfg.h" 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 /* 0-5: PIO_SBC */ 18 /* 10-1 [all...] |
| /freebsd-src/sys/contrib/device-tree/src/arm64/allwinner/ |
| H A D | sun50i-h616-orangepi-zero.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 9 #include "sun50i-h616.dtsi" 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/leds/common.h> 22 stdout-path = "serial0:115200n8"; 26 compatible = "gpio-leds"; 28 led-0 { 31 gpios = <&pio 2 12 GPIO_ACTIVE_HIGH>; /* PC12 */ 32 default-state = "on"; [all …]
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| H A D | sun50i-h618-orangepi-zero2w.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 8 #include "sun50i-h616.dtsi" 9 #include "sun50i-h616-cpu-opp.dtsi" 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-binding [all...] |
| /freebsd-src/sys/contrib/device-tree/src/arm/allwinner/ |
| H A D | sun5i-a13-utoo-p66.dts | 4 * This file is dual-licensed: you can use it either under the terms 43 /dts-v1/; 44 #include "sun5i-a13.dtsi" 45 #include "sun5i-reference-design-tablet.dtsi" 46 #include <dt-bindings/interrupt-controller/irq.h> 50 compatible = "utoo,p66", "allwinner,sun5i-a13"; 52 /* The P66 uses the uart pins as gpios */ 54 /delete-property/serial0; 58 /delete-property/stdout-path; 63 compatible = "i2c-gpio"; [all …]
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