| /freebsd-src/sys/contrib/device-tree/Bindings/ata/ |
| H A D | ceva,ahci-1v84.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/ata/ceva,ahci-1v84.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mubin Sayyed <mubin.sayyed@amd.com>
11 - Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
15 special extensions to add functionality, is a high-performance dual-port
22 const: ceva,ahci-1v84
30 dma-coherent: true
38 power-domains:
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| H A D | ahci-ceva.txt | 4 - reg: Physical base address and size of the controller's register area.
5 - compatible: Compatibility string. Must be 'ceva,ahci-1v84'.
6 - clocks: Input clock specifier. Refer to common clock bindings.
7 - interrupts: Interrupt specifier. Refer to interrupt binding.
8 - ceva,p0-cominit-params: OOB timing value for COMINIT parameter for port 0.
9 - ceva,p1-cominit-params: OOB timing value for COMINIT parameter for port 1.
11 ceva,pN-cominit-params = /bits/ 8 <CIBGMN CIBGMX CIBGN CINMP>;
16 - ceva,p0-comwake-params: OOB timing value for COMWAKE parameter for port 0.
17 - ceva,p1-comwake-params: OOB timing value for COMWAKE parameter for port 1.
19 ceva,pN-comwake-params = /bits/ 8 <CWBGMN CWBGMX CWBGN CWNMP>;
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| /freebsd-src/sys/contrib/device-tree/src/arm64/xilinx/ |
| H A D | zynqmp-zc1232-revA.dts | 1 // SPDX-License-Identifier: GPL-2.0+
5 * (C) Copyright 2017 - 2021, Xilinx, Inc.
10 /dts-v1/;
13 #include "zynqmp-clk-ccf.dtsi"
17 compatible = "xlnx,zynqmp-zc1232-revA", "xlnx,zynqmp-zc1232", "xlnx,zynqmp";
27 stdout-path = "serial0:115200n8";
43 compatible = "m25p80", "jedec,spi-nor"; /* 32MB */
44 #address-cells = <1>;
45 #size-cells = <1>;
47 spi-tx-bus-width = <4>;
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| H A D | zynqmp-zc1751-xm017-dc3.dts | 1 // SPDX-License-Identifier: GPL-2.0+
3 * dts file for Xilinx ZynqMP zc1751-xm017-dc3
5 * (C) Copyright 2016 - 2021, Xilinx, Inc.
10 /dts-v1/;
13 #include "zynqmp-clk-ccf.dtsi"
14 #include <dt-bindings/phy/phy.h>
17 model = "ZynqMP zc1751-xm017-dc3 RevA";
18 compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp";
34 stdout-path = "serial0:115200n8";
43 compatible = "fixed-clock";
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| H A D | zynqmp-sck-kv-g-revA.dts | 1 // SPDX-License-Identifier: GPL-2.0
5 * (C) Copyright 2020 - 2021, Xilinx, Inc.
8 * "A" – A01 board un-modified (NXP)
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/net/ti-dp83867.h>
17 #include <dt-bindings/phy/phy.h>
18 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
20 /dts-v1/;
23 &i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */
24 #address-cells = <1>;
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| H A D | zynqmp-sck-kv-g-revA.dtso | 1 // SPDX-License-Identifier: GPL-2.0
5 * (C) Copyright 2020 - 2022, Xilinx, Inc.
6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc.
9 * "A" - A01 board un-modified (NXP)
10 * "Y" - A01 board modified with legacy interposer (Nexperia)
11 * "Z" - A01 board modified with Diode interposer
16 #include <dt-binding
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| H A D | zynqmp-zc1751-xm015-dc1.dts | 1 // SPDX-License-Identifier: GPL-2.0+
3 * dts file for Xilinx ZynqMP zc1751-xm015-dc1
5 * (C) Copyright 2015 - 2022, Xilinx, Inc.
6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc.
11 /dts-v1/;
14 #include "zynqmp-clk-cc
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| H A D | zynqmp-zcu104-revC.dts | 1 // SPDX-License-Identifier: GPL-2.0
5 * (C) Copyright 2017 - 2022, Xilinx, Inc.
6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc.
11 /dts-v1/;
14 #include "zynqmp-clk-ccf.dtsi"
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-binding
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| H A D | zynqmp-zcu104-revA.dts | 1 // SPDX-License-Identifier: GPL-2.0+
5 * (C) Copyright 2017 - 2022, Xilinx, Inc.
6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc.
11 /dts-v1/;
14 #include "zynqmp-clk-ccf.dtsi"
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-binding
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| H A D | zynqmp-zcu111-revA.dts | 1 // SPDX-License-Identifier: GPL-2.0+
5 * (C) Copyright 2017 - 2022, Xilinx, Inc.
6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc.
11 /dts-v1/;
14 #include "zynqmp-clk-ccf.dtsi"
15 #include <dt-bindings/input/input.h>
16 #include <dt-binding
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| H A D | zynqmp-zcu106-revA.dts | 1 // SPDX-License-Identifier: GPL-2.0+
5 * (C) Copyright 2016 - 2022, Xilinx, Inc.
6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc.
11 /dts-v1/;
14 #include "zynqmp-clk-ccf.dtsi"
15 #include <dt-bindings/input/input.h>
16 #include <dt-binding
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| H A D | zynqmp-zcu102-revA.dts | 1 // SPDX-License-Identifier: GPL-2.0+
5 * (C) Copyright 2015 - 2022, Xilinx, Inc.
6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc.
11 /dts-v1/;
14 #include "zynqmp-clk-ccf.dtsi"
15 #include <dt-bindings/input/input.h>
16 #include <dt-binding
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| /freebsd-src/sys/dev/cxgbe/ |
| H A D | t4_main.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
272 * Each tunable is set to a default value here if it's known at compile-time.
273 * Otherwise it is set to -n as an indication to tweak_tunables() that it should
290 int t4_ntxq = -NTXQ;
296 int t4_nrxq = -NRXQ;
302 static int t4_ntxq_vi = -NTXQ_V
2106 struct adapter_params params; global() member
3232 cxgbe_snd_tag_alloc(if_t ifp,union if_snd_tag_alloc_params * params,struct m_snd_tag ** pt) cxgbe_snd_tag_alloc() argument
9644 uint64_t *p0, *p1; sysctl_lb_stats() local
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| /freebsd-src/sys/dev/hptmv/ |
| H A D | entry.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2004-2005 HighPoint Technologies, Inc.
164 * Parameters: pMvSataAdapter - pointer to the RR18xx controller this
166 * channelNum - channel number.
173 pAdapter->mvSataAdapter.sataChannel[channelNum] = NULL; in hptmv_free_channel()
178 PVBus _vbus_p = pVDev->pVBu in failDevice()
2963 DoXor1(ULONG * p0,ULONG * p1,ULONG * p2,UINT nBytes) DoXor1() argument
2970 DoXor2(ULONG * p0,ULONG * p2,UINT nBytes) DoXor2() argument
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| /freebsd-src/contrib/llvm-project/clang/lib/Sema/ |
| H A D | SemaDecl.cpp | 1 //===--- SemaDecl.cpp - Semantic Analysis for Declarations ------
2450 SmallVector<ParmVarDecl *, 16> Params; CreateBuiltin() local
4268 SmallVector<ParmVarDecl *, 16> Params; MergeFunctionDecl() local
6085 hasSimilarParameters(ASTContext & Context,FunctionDecl * Declaration,FunctionDecl * Definition,SmallVectorImpl<unsigned> & Params) hasSimilarParameters() argument
10296 SmallVector<ParmVarDecl*, 16> Params; ActOnFunctionDeclarator() local
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| /freebsd-src/contrib/llvm-project/clang/lib/AST/ |
| H A D | ASTContext.cpp | 1 //===- ASTContext.cpp - Context to hold long-lived AST nodes -------
692 TemplateParameterList *Params = Parm->getTemplateParameters(); Profile() local
744 TemplateParameterList *Params = TTP->getTemplateParameters(); getCanonicalTemplateTemplateParmDecl() local
5207 getInjectedTemplateArgs(const TemplateParameterList * Params,SmallVectorImpl<TemplateArgument> & Args) getInjectedTemplateArgs() argument
12841 __anonccad05b00f02(const ObjCProtocolDecl *P0, const ObjCProtocolDecl *P1) getCommonNonSugarTypeNode() argument
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| /freebsd-src/contrib/sqlite3/ |
| H A D | sqlite3.c | 17 ** language. The code for the "sqlite3" command-line shell is also in a
20 ** The content in this amalgamation comes from Fossil check-in
51 ** NO_TEST - The branches on this line are not
56 ** OPTIMIZATION-IF-TRUE - This branch is allowed to always be false
60 ** OPTIMIZATION-IF-FALSE - This branch is allowed to always be true
64 ** PREVENTS-HARMLES
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