Searched +full:opp +full:- +full:1401600000 (Results 1 – 11 of 11) sorted by relevance
/freebsd-src/sys/contrib/device-tree/Bindings/opp/ |
H A D | qcom-nvmem-cpufreq.txt | 1 Qualcomm Technologies, Inc. NVMEM CPUFreq and OPP bindings 5 the CPU frequencies subset and voltage value of each OPP varies based on 8 defines the voltage and frequency value based on the msm-id in SMEM 10 The qcom-cpufreq-nvmem driver reads the msm-id and efuse value from the SoC 11 to provide the OPP framework with required information (existing HW bitmap). 12 This is used to determine the voltage and frequency value for each OPP of 13 operating-points-v2 table when it is parsed by the OPP framework. 16 -------------------- 18 - operating-points-v2: Phandle to the operating-points-v2 table to use. 20 In 'operating-points-v2' table: [all …]
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H A D | opp-v2-kryo-cpu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/opp/opp-v2-kryo-cpu.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Technologies, Inc. NVMEM OPP 10 - Ilia Lin <ilia.lin@kernel.org> 13 - $ref: opp-v2-base.yaml# 17 the CPU frequencies subset and voltage value of each OPP varies based on 22 The qcom-cpufreq-nvmem driver reads the efuse value from the SoC to provide 23 the OPP framework with required information (existing HW bitmap). [all …]
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/freebsd-src/sys/contrib/device-tree/Bindings/cpufreq/ |
H A D | qcom-cpufreq-nvmem.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/cpufreq/qcom-cpufreq-nvmem.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Ilia Lin <ilia.lin@kernel.org> 17 on the CPU OPP in use. The CPUFreq driver sets the CPR power domain level 18 according to the required OPPs defined in the CPU OPP tables. 20 For old implementation efuses are parsed to select the correct opp table and 28 - qcom,apq8064 29 - qcom,apq8096 [all …]
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/freebsd-src/sys/contrib/device-tree/src/arm64/qcom/ |
H A D | sa8540p.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 9 /delete-node/ &cpu0_opp_table; 10 /delete-node/ &cpu4_opp_table; 13 cpu0_opp_table: opp-table-cpu0 { 14 compatible = "operating-point [all...] |
H A D | msm8996.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) 2014-2015, The Linux Foundation. All rights reserved. 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/clock/qcom,gcc-msm899 [all...] |
H A D | qcs404.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/clock/qcom,gcc-qcs404.h> 8 #include <dt-bindings/clock/qcom,turingcc-qcs40 [all...] |
H A D | sm8150.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 3 * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved. 7 #include <dt-bindings/dma/qcom-gpi.h> 8 #include <dt-bindings/firmware/qcom,scm.h> 9 #include <dt-bindings/interrupt-controlle [all...] |
H A D | sm6375.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 6 #include <dt-bindings/clock/qcom,rpmcc.h> 7 #include <dt-bindings/clock/qcom,sm6375-gcc.h> 8 #include <dt-bindings/clock/qcom,sm6375-gpucc.h> 9 #include <dt-binding [all...] |
H A D | sm6350.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 7 #include <dt-bindings/clock/qcom,dispcc-sm6350.h> 8 #include <dt-bindings/clock/qcom,gcc-sm6350.h> 9 #include <dt-bindings/clock/qcom,gpucc-sm635 [all...] |
H A D | sc8280xp.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 7 #include <dt-bindings/clock/qcom,dispcc-sc8280xp.h> 8 #include <dt-bindings/clock/qcom,gcc-sc8280xp.h> 9 #include <dt-bindings/clock/qcom,gpucc-sc8280x [all...] |
H A D | sm8250.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/clock/qcom,dispcc-sm8250.h> 8 #include <dt-binding [all...] |