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/llvm-project/llvm/test/MC/X86/
H A Dx86_64-asm-match.s6 …rmal operand class MCK_VR64 against actual operand at index 1 (Memory: ModeSize=64,BaseReg=rip,Sca…
8 …rmal operand class MCK_FR16 against actual operand at index 1 (Memory: ModeSize=64,BaseReg=rip,Sca…
10 // CHECK: Matching formal operand class MCK_Mem128 against actual operand at index 1 (Memory: Mod…
11 // CHECK: Matching formal operand class MCK_FR16 against actual operand at index 2 (Reg:xmm1): ma…
12 // CHECK: Matching formal operand class InvalidMatchClass against actual operand at index 3: actu…
16 // CHECK: Matching formal operand class MCK_ImmUnsignedi8 against actual operand at index 1 (Imm:…
17 // CHECK: Matching formal operand class MCK_FR16 against actual operand at index 2 (Reg:xmm1): ma…
18 // CHECK: Matching formal operand class MCK_FR16 against actual operand at index 3 (Reg:xmm2): ma…
19 // CHECK: Matching formal operand class InvalidMatchClass against actual operand at index 4: actu…
23 // CHECK: Matching formal operand class MCK_ImmUnsignedi8 against actual operand at index 1 (Imm:…
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/llvm-project/llvm/test/MC/SystemZ/
H A Dasm-match.s8 // CHECK: Matching formal operand class MCK_GR64 against actual operand at index 1 (Reg:r3): match success using generic matcher
9 // CHECK: Matching formal operand class MCK_GR64 against actual operand at index 2 (Reg:r0): match success using generic matcher
10 // CHECK: Matching formal operand class MCK_BDAddr32Disp20 against actual operand at index 3 (Mem:3): match success using generic matcher
11 // CHECK: Matching formal operand class InvalidMatchClass against actual operand at index 4: actual operand index out of range
15 // CHECK: Matching formal operand clas
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H A Dinsn-bad-z196.s7 #CHECK: error: invalid operand
9 #CHECK: error: invalid operand
15 #CHECK: error: invalid operand
17 #CHECK: error: invalid operand
23 #CHECK: error: invalid operand
25 #CHECK: error: invalid operand
31 #CHECK: error: invalid operand
33 #CHECK: error: invalid operand
39 #CHECK: error: invalid operand
41 #CHECK: error: invalid operand
[all …]
H A Dinsn-bad-z15.s25 #CHECK: error: invalid operand
27 #CHECK: error: invalid operand
36 #CHECK: error: invalid operand
38 #CHECK: error: invalid operand
54 #CHECK: error: invalid operand
56 #CHECK: error: invalid operand
58 #CHECK: error: invalid operand
60 #CHECK: error: invalid operand
74 #CHECK: error: invalid operand
76 #CHECK: error: invalid operand
[all …]
H A Dinsn-bad-z13.s20 #CHECK: error: invalid operand
22 #CHECK: error: invalid operand
28 #CHECK: error: invalid operand
30 #CHECK: error: invalid operand
32 #CHECK: error: invalid operand
34 #CHECK: error: invalid operand
52 #CHECK: error: invalid operand
54 #CHECK: error: invalid operand
60 #CHECK: error: invalid operand
62 #CHECK: error: invalid operand
[all...]
H A Dinsn-bad-z14.s7 #CHECK: error: invalid operand
9 #CHECK: error: invalid operand
15 #CHECK: error: invalid operand
17 #CHECK: error: invalid operand
19 #CHECK: error: invalid operand
21 #CHECK: error: invalid operand
29 #CHECK: error: invalid operand
31 #CHECK: error: invalid operand
58 #CHECK: error: invalid operand
60 #CHECK: error: invalid operand
[all …]
H A Dinsn-bad.s7 #CHECK: error: invalid operand
9 #CHECK: error: invalid operand
15 #CHECK: error: invalid operand
17 #CHECK: error: invalid operand
23 #CHECK: error: invalid operand
25 #CHECK: error: invalid operand
36 #CHECK: error: invalid operand
38 #CHECK: error: invalid operand
44 #CHECK: error: invalid operand
46 #CHECK: error: invalid operand
[all...]
H A Dinsn-bad-z16.s50 #CHECK: error: invalid operand
52 #CHECK: error: invalid operand
61 #CHECK: error: invalid operand
63 #CHECK: error: invalid operand
127 #CHECK: error: invalid operand
129 #CHECK: error: invalid operand
138 #CHECK: error: invalid operand
140 #CHECK: error: invalid operand
146 #CHECK: error: invalid operand
148 #CHECK: error: invalid operand
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/llvm-project/llvm/test/MC/RISCV/corev/
H A DXCValu-invalid.s5 # CHECK-ERROR: invalid operand for instruction
8 # CHECK-ERROR: invalid operand for instruction
11 # CHECK-ERROR: invalid operand for instruction
17 # CHECK-ERROR: invalid operand for instruction
29 # CHECK-ERROR: invalid operand for instruction
32 # CHECK-ERROR: invalid operand for instruction
35 # CHECK-ERROR: invalid operand for instruction
41 # CHECK-ERROR: invalid operand for instruction
44 # CHECK-ERROR: invalid operand for instruction
47 # CHECK-ERROR: invalid operand for instruction
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H A DXCVmac-invalid.s5 # CHECK-ERROR: invalid operand for instruction
8 # CHECK-ERROR: invalid operand for instruction
11 # CHECK-ERROR: invalid operand for instruction
17 # CHECK-ERROR: invalid operand for instruction
29 # CHECK-ERROR: invalid operand for instruction
32 # CHECK-ERROR: invalid operand for instruction
35 # CHECK-ERROR: invalid operand for instruction
41 # CHECK-ERROR: invalid operand for instruction
53 # CHECK-ERROR: invalid operand for instruction
56 # CHECK-ERROR: invalid operand for instruction
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H A DXCVmem-invalid.s8 # CHECK-ERROR: invalid operand for instruction
11 # CHECK-ERROR: invalid operand for instruction
14 # CHECK-ERROR: operand must be a symbol with %lo/%pcrel_lo/%tprel_lo modifier or an integer in the …
17 # CHECK-ERROR: operand must be a symbol with %lo/%pcrel_lo/%tprel_lo modifier or an integer in the …
23 # CHECK-ERROR: invalid operand for instruction
32 # CHECK-ERROR: invalid operand for instruction
38 # CHECK-ERROR: invalid operand for instruction
41 # CHECK-ERROR: invalid operand for instruction
44 # CHECK-ERROR: operand must be a symbol with %lo/%pcrel_lo/%tprel_lo modifier or an integer in the …
47 # CHECK-ERROR: operand must be a symbol with %lo/%pcrel_lo/%tprel_lo modifier or an integer in the …
[all …]
/llvm-project/mlir/include/mlir/Dialect/SPIRV/IR/
H A DSPIRVArithmeticOps.td42 // Operand type same as result type.
49 SPIRV_ScalarOrVectorOrCoopMatrixOf<type>:$operand
60 // Result type is a struct with two operand-typed elements.
86 let summary = "Floating-point addition of Operand 1 and Operand 2.";
91 The types of Operand 1 and Operand 2 both must be the same as Result
108 let summary = "Floating-point division of Operand 1 divided by Operand 2.";
113 The types of Operand 1 and Operand 2 both must be the same as Result
117 if Operand 2 is 0.
132 The floating-point remainder whose sign matches the sign of Operand 2.
138 The types of Operand 1 and Operand 2 both must be the same as Result
[all …]
H A DSPIRVLogicalOps.td28 "equivalent of the operand",
42 "equivalent of the operand",
43 "operand", "result",
46 let assemblyFormat = "$operand `:` type($operand) attr-dict";
57 The type of Operand 1 and Operand 2 must be a scalar or vector of
76 Floating-point comparison if operands are ordered and Operand 1 is
77 greater than Operand 2.
83 The type of Operand
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/llvm-project/llvm/test/MC/Mips/virt/
H A Dinvalid.s11 mfgc0 0 # CHECK: :[[@LINE]]:9: error: invalid operand for instruction
13 mfgc0 0, $4 # CHECK: :[[@LINE]]:9: error: invalid operand for instruction
14 mfgc0 0, $4, $5 # CHECK: :[[@LINE]]:9: error: invalid operand for instruction
15 mfgc0 $4, 0, $5 # CHECK: :[[@LINE]]:13: error: invalid operand for instruction
18 mfgc0 $4, $5, 0($4) # CHECK: :[[@LINE]]:18: error: invalid operand for instruction
20 mtgc0 0 # CHECK: :[[@LINE]]:9: error: invalid operand for instruction
22 mtgc0 0, $4 # CHECK: :[[@LINE]]:9: error: invalid operand for instruction
23 mtgc0 0, $4, $5 # CHECK: :[[@LINE]]:9: error: invalid operand for instruction
24 mtgc0 $4, 0, $5 # CHECK: :[[@LINE]]:13: error: invalid operand for instruction
27 mtgc0 $4, $5, 0($4) # CHECK: :[[@LINE]]:18: error: invalid operand for instruction
[all …]
/llvm-project/llvm/test/MC/AArch64/
H A Darmv8.5a-mte-error.s21 // CHECK: invalid operand for instruction
23 // CHECK: invalid operand for instruction
25 // CHECK: invalid operand for instruction
27 // CHECK: invalid operand for instruction
29 // CHECK: invalid operand for instruction
31 // CHECK: invalid operand for instruction
33 // CHECK: invalid operand for instruction
35 // CHECK: invalid operand for instruction
37 // CHECK: invalid operand for instruction
39 // CHECK: invalid operand for instruction
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H A Darmv8.1a-lse.s983 // CHECK-ERROR: error: invalid operand for instruction
988 // CHECK-ERROR: error: invalid operand for instruction
993 // CHECK-ERROR: error: invalid operand for instruction
998 // CHECK-ERROR: error: invalid operand for instruction
1003 // CHECK-ERROR: error: invalid operand for instruction
1008 // CHECK-ERROR: error: invalid operand for instruction
1013 // CHECK-ERROR: error: invalid operand for instruction
1018 // CHECK-ERROR: error: invalid operand for instruction
1023 // CHECK-ERROR: error: invalid operand for instruction
1028 // CHECK-ERROR: error: invalid operand for instruction
[all …]
/llvm-project/llvm/test/MC/AMDGPU/
H A Dgfx11_asm_vop1_t16_err.s6 // GFX11: :[[@LINE-1]]:16: error: invalid operand for instruction
9 // GFX11: :[[@LINE-1]]:16: error: invalid operand for instruction
12 // GFX11: :[[@LINE-1]]:16: error: invalid operand for instruction
15 // GFX11: :[[@LINE-1]]:16: error: invalid operand for instruction
18 // GFX11: :[[@LINE-1]]:16: error: invalid operand for instruction
21 // GFX11: :[[@LINE-1]]:16: error: invalid operand for instruction
24 // GFX11: :[[@LINE-1]]:16: error: invalid operand for instruction
27 // GFX11: :[[@LINE-1]]:16: error: invalid operand for instruction
30 // GFX11: :[[@LINE-1]]:22: error: invalid operand for instruction
33 // GFX11: :[[@LINE-1]]:22: error: invalid operand fo
[all...]
H A Dvop-err.s10 // CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand (violates constant bus restrictions)
13 // CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand (violates constant bus restrictions)
16 // CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand (violates constant bus restrictions)
19 // CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand (violates constant bus restrictions)
22 // CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand (violates constant bus restrictions)
25 // CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand (violates constant bus restrictions)
28 // CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand (violates constant bus restrictions)
31 // CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand (violates constant bus restrictions)
34 // CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand (violates constant bus restrictions)
37 // CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand (violates constant bus restrictions)
[all …]
H A Dgfx12_asm_vop3c.s9 // W64-ERR: :[[@LINE-2]]:21: error: invalid operand for instruction
13 // W64-ERR: :[[@LINE-2]]:21: error: invalid operand for instruction
17 // W64-ERR: :[[@LINE-2]]:21: error: invalid operand for instruction
21 // W64-ERR: :[[@LINE-2]]:21: error: invalid operand for instruction
25 // W64-ERR: :[[@LINE-2]]:21: error: invalid operand for instruction
29 // W64-ERR: :[[@LINE-2]]:21: error: invalid operand for instruction
33 // W64-ERR: :[[@LINE-2]]:21: error: invalid operand for instruction
37 // W64-ERR: :[[@LINE-2]]:21: error: invalid operand for instruction
41 // W64-ERR: :[[@LINE-2]]:21: error: invalid operand for instruction
45 // W64-ERR: :[[@LINE-2]]:21: error: invalid operand fo
[all...]
H A Dgfx11_asm_vop3_from_vopc.s9 // W64-ERR: :[[@LINE-2]]:21: error: invalid operand for instruction
13 // W64-ERR: :[[@LINE-2]]:21: error: invalid operand for instruction
17 // W64-ERR: :[[@LINE-2]]:21: error: invalid operand for instruction
21 // W64-ERR: :[[@LINE-2]]:21: error: invalid operand for instruction
25 // W64-ERR: :[[@LINE-2]]:21: error: invalid operand for instruction
29 // W64-ERR: :[[@LINE-2]]:21: error: invalid operand for instruction
33 // W64-ERR: :[[@LINE-2]]:21: error: invalid operand for instruction
37 // W64-ERR: :[[@LINE-2]]:21: error: invalid operand for instruction
41 // W64-ERR: :[[@LINE-2]]:21: error: invalid operand for instruction
45 // W64-ERR: :[[@LINE-2]]:21: error: invalid operand fo
[all...]
H A Dgfx12_asm_vop3p_err.s4 // GFX12: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
7 // GFX12: :[[@LINE-1]]:{{[0-9]+}}: error: not a valid operand
10 // GFX12: :[[@LINE-1]]:{{[0-9]+}}: error: not a valid operand
13 // GFX12: :[[@LINE-1]]:{{[0-9]+}}: error: not a valid operand
16 // GFX12: :[[@LINE-1]]:{{[0-9]+}}: error: not a valid operand
19 // GFX12: :[[@LINE-1]]:{{[0-9]+}}: error: not a valid operand
22 // GFX12: :[[@LINE-1]]:{{[0-9]+}}: error: not a valid operand
25 // GFX12: :[[@LINE-1]]:{{[0-9]+}}: error: invalid neg_lo operand
28 // GFX12: :[[@LINE-1]]:{{[0-9]+}}: error: invalid neg_lo operand
31 // GFX12: :[[@LINE-1]]:{{[0-9]+}}: error: invalid neg_hi operand
[all...]
/llvm-project/llvm/test/MC/Mips/eva/
H A Dinvalid-noeva-wrong-error.s
/llvm-project/flang/test/Semantics/
H A Dshape.f902 ! Test comparisons that use the intrinsic SHAPE() as an operand
11 !ERROR: Dimension 1 of left operand has extent 1, but right operand has extent 0
12 !ERROR: Dimension 1 of left operand has extent 1, but right operand has extent 0
16 !ERROR: Dimension 1 of left operand has extent 0, but right operand has extent 1
17 !ERROR: Dimension 1 of left operand has extent 0, but right operand has extent 1
24 !ERROR: Dimension 1 of left operand has extent 1, but right operand has extent 0
25 !ERROR: Dimension 1 of left operand has extent 1, but right operand has extent 0
29 !ERROR: Dimension 1 of left operand has extent 0, but right operand has extent 1
30 !ERROR: Dimension 1 of left operand has extent 0, but right operand has extent 1
37 !ERROR: Dimension 1 of left operand has extent 1, but right operand has extent 0
[all …]
/llvm-project/clang/lib/Headers/
H A Dcrc32intrin.h16 /// Adds the unsigned integer operand to the CRC-32C checksum of the
17 /// unsigned char operand.
24 /// An unsigned integer operand to add to the CRC-32C checksum of operand
27 /// An unsigned 8-bit integer operand used to compute the CRC-32C checksum.
28 /// \returns The result of adding operand \a __C to the CRC-32C checksum of
29 /// operand \a __D.
36 /// Adds the unsigned integer operand to the CRC-32C checksum of the
37 /// unsigned short operand.
44 /// An unsigned integer operand to add to the CRC-32C checksum of operand
47 /// An unsigned 16-bit integer operand used to compute the CRC-32C checksum.
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/llvm-project/llvm/test/MC/PowerPC/
H A Dppc64-encoding-ISA31-errors.s6 # CHECK: error: invalid operand for instruction
9 # CHECK: error: invalid operand for instruction
12 # CHECK: error: invalid operand for instruction
15 # CHECK: error: invalid operand for instruction
18 # CHECK: error: invalid operand for instruction
21 # CHECK: error: invalid operand for instruction
24 # CHECK: error: invalid operand for instruction
27 # CHECK: error: invalid operand for instruction
30 # CHECK: error: invalid operand for instruction
33 # CHECK: error: invalid operand for instruction
[all …]

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