| /freebsd-src/sys/contrib/device-tree/Bindings/remoteproc/ |
| H A D | ti,omap-remoteproc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/ti,omap-remoteproc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: OMAP4+ Remoteproc Devices 10 - Suman Anna <s-anna@ti.com> 13 The OMAP family of SoCs usually have one or more slave processor sub-systems 14 that are used to offload some of the processor-intensive tasks, or to manage 17 The processor cores in the sub-system are usually behind an IOMMU, and may 18 contain additional sub-modules like Internal RAM and/or ROMs, L1 and/or L2 [all …]
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| /freebsd-src/sys/contrib/device-tree/Bindings/iommu/ |
| H A D | ti,omap-iommu.txt | 4 - compatible : Should be one of, 5 "ti,omap2-iommu" for OMAP2/OMAP3 IOMMU instances 6 "ti,omap4-iommu" for OMAP4/OMAP5 IOMMU instances 7 "ti,dra7-dsp-iommu" for DRA7xx DSP IOMMU instances 8 "ti,dra7-iommu" for DRA7xx IOMMU instances 9 - ti,hwmods : Name of the hwmod associated with the IOMMU instance 10 - reg : Address space for the configuration registers 11 - interrupts : Interrupt specifier for the IOMMU instance 12 - #iommu-cells : Should be 0. OMAP IOMMUs are all "single-master" devices, 19 - ti,#tlb-entries : Number of entries in the translation look-aside buffer. [all …]
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| /freebsd-src/sys/contrib/device-tree/src/arm/ti/omap/ |
| H A D | omap4.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ 6 #include <dt-bindings/bus/ti-sysc.h> 7 #include <dt-bindings/clock/omap4.h> 8 #include <dt-binding 349 dsp: dsp { global() label [all...] |
| H A D | omap4-l4-abe.dtsi | 2 compatible = "ti,omap4-l4-abe", "simple-pm-bus"; 5 reg-names = "la", "ap"; 6 power-domains = <&prm_abe>; 7 /* OMAP4_L4_ABE_CLKCTRL is read-only */ 8 #address-cells = <1>; 9 #size-cells = <1>; 13 compatible = "simple-pm-bus"; 14 #address-cells = <1>; 15 #size-cells = <1>; 89 target-module@22000 { /* 0x40122000, ap 2 02.0 */ [all …]
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| H A D | omap5-l4-abe.dtsi | 2 compatible = "ti,omap5-l4-abe", "simple-pm-bus"; 5 reg-names = "la", "ap"; 6 power-domains = <&prm_abe>; 7 /* OMAP5_L4_ABE_CLKCTRL is read-only */ 8 #address-cells = <1>; 9 #size-cells = <1>; 13 compatible = "simple-pm-bus"; 14 #address-cells = <1>; 15 #size-cells = <1>; 89 target-module@22000 { /* 0x40122000, ap 2 02.0 */ [all …]
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| H A D | omap5.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ 5 * Based on "omap4.dtsi" 8 #include <dt-bindings/bus/ti-sysc.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-binding 256 dsp: dsp { global() label [all...] |
| H A D | dra74x.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/ 5 * Based on "omap4.dtsi" 16 compatible = "arm,cortex-a15"; 18 operating-points-v2 = <&cpu0_opp_table>; 21 clock-names = "cpu"; 23 clock-latency = <300000>; /* From omap-cpufreq driver */ 26 #cooling-cells = <2>; /* min followed by max */ 28 vbb-supply = <&abb_mpu>; 40 compatible = "arm,cortex-a15-pmu"; [all …]
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| H A D | dra7xx-clocks.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 8 atl_clkin0_ck: clock-atl-clkin0 { 9 #clock-cells = <0>; 10 compatible = "ti,dra7-atl-clock"; 11 clock-outpu [all...] |
| H A D | dra7.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ 5 * Based on "omap4.dtsi" 8 #include <dt-bindings/bus/ti-sysc.h> 9 #include <dt-bindings/clock/dra7.h> 10 #include <dt-binding [all...] |
| H A D | dm816x.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 #include <dt-bindings/bus/ti-sysc.h> 4 #include <dt-bindings/clock/dm816.h> 5 #include <dt-bindings/gpio/gpio.h> 6 #include <dt-bindings/pinctrl/omap.h> 10 interrupt-parent = <&intc>; 11 #address-cells = <1>; 12 #size-cells = <1>; 26 #address-cells = <1>; 27 #size-cells = <0>; [all …]
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| H A D | omap4-l4.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 compatible = "ti,omap4-l4-cfg", "simple-pm-bus"; 4 power-domains = <&prm_core>; 6 clock-names = "fck"; 10 reg-names = "ap", "la", "ia0"; 11 #address-cells = <1>; 12 #size-cells = <1>; 22 compatible = "simple-pm-bus"; 23 #address-cells = <1>; 24 #size-cells = <1>; [all …]
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| H A D | omap5-l4.dtsi | 2 compatible = "ti,omap5-l4-cfg", "simple-pm-bus"; 3 power-domains = <&prm_core>; 5 clock-names = "fck"; 9 reg-names = "ap", "la", "ia0"; 10 #address-cells = <1>; 11 #size-cells = <1>; 21 compatible = "simple-pm-bus"; 22 #address-cells = <1>; 23 #size-cells = <1>; 55 target-module@2000 { /* 0x4a002000, ap 3 44.0 */ [all …]
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| H A D | omap4-panda-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2011-2013 Texas Instruments Incorporated - https://www.ti.com/ 5 #include <dt-bindings/input/input.h> 7 #include "omap4-mcpdm.dtsi" 15 reserved-memor [all...] |
| /freebsd-src/sys/contrib/device-tree/Bindings/timer/ |
| H A D | ti,timer-dm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/timer/ti,timer-dm.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: TI dual-mode timer 10 - Tony Lindgren <tony@atomide.com> 13 The TI dual-mode timer is a general purpose timer with PWM capabilities. 18 - items: 19 - enum: 20 - ti,am335x-timer [all …]
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| /freebsd-src/sys/contrib/device-tree/Bindings/mailbox/ |
| H A D | ti,omap-mailbox.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mailbox/ti,omap-mailbox.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Suman Anna <s-anna@ti.com> 35 lines can also be routed to different processor sub-systems on DRA7xx as they 49 within a SoC. The sub-mailboxes (actual communication channels) are 56 "mbox-names" (please see Documentation/devicetree/bindings/mailbox/mailbox.txt 59 phandle to the intended sub-mailbox child node to be used for communication. 60 The equivalent "mbox-names" property value can be used to give a name to the [all …]
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| H A D | omap-mailbox.txt | 25 routed to different processor sub-systems on DRA7xx as they are routed through 38 a SoC. The sub-mailboxes are represented as child nodes of this parent node. 41 -------------------- 42 - compatible: Should be one of the following, 43 "ti,omap2-mailbox" for OMAP2420, OMAP2430 SoCs 44 "ti,omap3-mailbox" for OMAP3430, OMAP3630 SoCs 45 "ti,omap4-mailbox" for OMAP44xx, OMAP54xx, AM33xx, 47 "ti,am654-mailbox" for K3 AM65x and J721E SoCs 48 "ti,am64-mailbox" for K3 AM64x SoCs 49 - reg: Contains the mailbox register address range (base [all …]
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| /freebsd-src/sys/contrib/device-tree/src/arm64/ti/ |
| H A D | k3-j784s4-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/mux/mux.h> 9 #include <dt-bindings/phy/phy.h> 10 #include <dt-bindings/phy/phy-t [all...] |
| H A D | k3-j721s2-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/phy/phy-cadence.h> 9 #include <dt-bindings/phy/phy-t [all...] |
| H A D | k3-j721e-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/ 7 #include <dt-bindings/phy/phy.h> 8 #include <dt-bindings/phy/phy-ti.h> 9 #include <dt-binding [all...] |
| /freebsd-src/sys/contrib/device-tree/Bindings/dma/ |
| H A D | ti-dma-crossbar.txt | 4 - compatible: "ti,dra7-dma-crossbar" for DRA7xx DMA crossbar 5 "ti,am335x-edma-crossbar" for AM335x and AM437x 6 - reg: Memory map for accessing module 7 - #dma-cells: Should be set to match with the DMA controller's dma-cells 8 for ti,dra7-dm [all...] |
| H A D | ti-edma.txt | 8 ------------------------------------------------------------------------------ 12 -------------------- 13 - compatible: Should be: 14 - "ti,edma3-tpcc" for the channel controller(s) on OMAP, 16 - "ti,k2g-edma3-tpcc", "ti,edma3-tpcc" for the 18 - #dma-cells: Should be set to <2>. The first number is the DMA request 20 - reg: Memory map of eDMA CC 21 - reg-names: "edma3_cc" 22 - interrupts: Interrupt lines for CCINT, MPERR and CCERRINT. 23 - interrupt-names: "edma3_ccint", "edma3_mperr" and "edma3_ccerrint" [all …]
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