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/freebsd-src/sys/dev/sdio/
H A Dsdiodevs1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
31 * Take SDIO CIS, CISTPL_MANFID, TPLMID_MANF and TPLMID_CARD information and
41 * ---
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H A Dsdiob.c1 /*-
3 * Copyright (c) 2018-2019 The FreeBSD Foundation
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
36 * Group. This Simplified Specification is provided on a non-confidential
39 * Association, SD Group, SD-3C LLC or other third parties.
45 * is provided "AS-IS" without any representations or warranties of any
46 * kind. No responsibility is assumed by the SD Group, SD-3C LLC or the SD
48 * right of the SD Group, SD-3C LLC, the SD Card Association or any third
49 * parties, which may result from its use. No licens
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/freebsd-src/sys/contrib/device-tree/Bindings/mmc/
H A Dmmc-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mmc-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ulf Hansson <ulf.hansson@linaro.org>
25 "#address-cells":
30 "#size-cells":
37 broken-cd:
40 There is no card detection available; polling must be used.
42 cd-gpios:
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H A Dsdhci-sprd.txt1 * Spreadtrum SDHCI controller (sdhci-sprd)
4 for MMC, SD and SDIO types of cards.
7 and the properties used by the sdhci-sprd driver.
10 - compatible: Should contain "sprd,sdhci-r11".
11 - reg: physical base address of the controller and length.
12 - interrupts: Interrupts used by the SDHCI controller.
13 - clocks: Should contain phandle for the clock feeding the SDHCI controller
14 - clock-names: Should contain the following:
15 "sdio" - SDIO source clock (required)
16 "enable" - gate clock which used for enabling/disabling the device (required)
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H A Dmarvell,xenon-sdhci.txt11 - compatible: should be one of the following
12 - "marvell,armada-3700-sdhci": For controllers on Armada-3700 SoC.
13 Must provide a second register area and marvell,pad-type.
14 - "marvell,armada-ap806-sdhci": For controllers on Armada AP806.
15 - "marvell,armada-ap807-sdhci": For controllers on Armada AP807.
16 - "marvell,armada-cp110-sdhci": For controllers on Armada CP110.
18 - clocks:
23 - clock-names:
28 - reg:
29 * For "marvell,armada-3700-sdhci", two register areas.
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H A Dmarvell,xenon-sdhci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/marvell,xenon-sdhci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 mmc-controller.yaml and the properties used by the Xenon implementation.
20 - Ulf Hansson <ulf.hansson@linaro.org>
25 - enum:
26 - marvell,armada-cp110-sdhci
27 - marvell,armada-ap806-sdhci
29 - items:
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H A Dmtk-sd.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mtk-sd.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chaotian Jing <chaotian.jing@mediatek.com>
11 - Wenbin Mei <wenbin.mei@mediatek.com>
16 - enum:
17 - mediatek,mt2701-mmc
18 - mediatek,mt2712-mmc
19 - mediatek,mt6779-mmc
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/freebsd-src/sys/arm/mv/
H A Dmvebu_pinctrl.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
67 {"mpp0", {"gpio", "sdio", NULL, "spi0"}},
68 {"mpp1", {"gpio", "sdio", NULL, "spi0"}},
69 {"mpp2", {"gpio", "sdio", NULL, "spi0"}},
70 {"mpp3", {"gpio", "sdio", NULL, "spi0"}},
71 {"mpp4", {"gpio", "sdio", NULL, "i2c0"}},
72 {"mpp5", {"gpio", "sdio", NULL, "i2c0"}},
73 {"mpp6", {"gpio", "sdio", NULL, NULL}},
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/freebsd-src/sys/contrib/dev/athk/ath10k/
H A Dsdio.c1 // SPDX-License-Identifier: ISC
3 * Copyright (c) 2004-2011 Atheros Communications Inc.
4 * Copyright (c) 2011-2012,2017 Qualcomm Atheros, Inc.
5 * Copyright (c) 2016-2017 Erik Stromdahl <erik.stromdahl@gmail.com>
14 #include <linux/mmc/sdio.h>
25 #include "sdio.h"
37 return __ALIGN_MASK((len), ar_sdio->mbox_info.block_mask); in ath10k_sdio_calc_txrx_padded_len()
47 dev_kfree_skb(pkt->skb); in ath10k_sdio_mbox_free_rx_pkt()
48 pkt->skb = NULL; in ath10k_sdio_mbox_free_rx_pkt()
49 pkt->alloc_len = 0; in ath10k_sdio_mbox_free_rx_pkt()
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/freebsd-src/usr.bin/sdiotool/
H A Dsdiotool.c1 /*-
2 * Copyright (c) 2016-2017 Ilya Bakulin
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
34 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
79 …() which is defined as probe function in struct sdio_driver. http://lxr.free-electrons.com/source/…
83 …* ops_sdio_probe() then calls brcmf_sdio_probe() -- at this point it has filled in sdiodev struct …
85 …ts F1 block size to 64 and F2 to 512, not consulting the values stored in SDIO CCCR / FBR registe…
89 …alls brcmf_sdio_probe() http://lxr.free-electrons.com/source/drivers/net/wireless/broadcom/brcm802…
91 * Here high-level workqueues and sg tables are allocated.
96 * Then turns off PLL: byte-write BRCMF_INIT_CLKCTL1 (0x28) -> SBSDIO_FUNC1_CHIPCLKCSR (0x1000E)
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H A Dbrcmfmac_sdio.h1 /*-
2 * SPDX-License-Identifier: ISC
12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
77 /* rev < 7, watermark for sdio device */
92 /* SdioPullUp (on cmd, d0-d2) */
104 /* Sdio Core Rev 12 */
125 /* with b15, maps to 32-bit SB access */
146 /* Packet alignment for most efficient SDIO (can change based on platform) */
150 * enum brcmf_sdiod_state - the state of the bus.
152 * @BRCMF_SDIOD_DOWN: Device can be accessed, no DPC.
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/freebsd-src/sys/contrib/device-tree/src/arm64/sprd/
H A Dums512-1h10.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Unisoc UMS512-1h10 boards DTS file
8 /dts-v1/;
13 model = "Unisoc UMS512-1H10 Board";
15 compatible = "sprd,ums512-1h10", "sprd,ums512";
28 stdout-path = "serial1:115200n8";
42 bus-width = <4>;
43 no-sdio;
44 no-mmc;
45 sprd,phy-delay-sd-uhs-sdr104 = <0x7f 0x73 0x72 0x72>;
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H A Dsc9863a.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <dt-bindings/clock/sprd,sc9863a-clk.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #address-cell
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/freebsd-src/sys/dev/bhnd/
H A Dbhnd_ids.h1 /*-
2 * SPDX-License-Identifier: ISC
4 * Copyright (c) 2015-2016 Landon Fuller <landon@landonf.org>
5 * Copyright (c) 1999-2015, Broadcom Corporation
9 * with the dd-wrt project, and the hndsoc.h header distributed with Broadcom's
19 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
30 * JEDEC JEP-106 Core Vendor IDs
32 * These are the JEDEC JEP-106 manufacturer ID representions (with ARM's
33 * non-standard 4-bit continutation code), as used in ARM's PrimeCell
38 * will need to convert bus-specific vendor IDs to their BHND_MFGID
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/freebsd-src/sys/contrib/device-tree/src/arm/allwinner/
H A Dsun6i-a31s-sinovoip-bpi-m2.dts4 * This file is dual-licensed: you can use it either under the terms
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
43 /dts-v1/;
44 #include "sun6i-a31s.dtsi"
45 #include <dt-bindings/gpio/gpio.h>
48 model = "Sinovoip BPI-M2";
49 compatible = "sinovoip,bpi-m2", "allwinner,sun6i-a31s";
56 stdout-path = "serial0:115200n8";
60 compatible = "gpio-led
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/freebsd-src/sys/contrib/device-tree/src/arm64/rockchip/
H A Drk3588s-indiedroid-nova.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/linux-event-codes.h>
7 #include <dt-bindings/pinctrl/rockchip.h>
8 #include <dt-binding
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H A Drk3588s-coolpi-4b.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * https://cool-pi.com/topic/130/coolpi-4b-product-spec-introduction
9 /dts-v1/;
11 #include <dt-binding
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H A Drk3588-rock-5b.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/leds/common.h>
11 compatible = "radxa,rock-5b", "rockchip,rk3588";
16 mmc2 = &sdio;
20 stdout-path = "serial2:1500000n8";
23 analog-soun
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/freebsd-src/sys/contrib/device-tree/src/arm/amlogic/
H A Dmeson8m2-mxiii-plus.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2018 Oleg Ivanov <balbes-150@yandex.ru>
7 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
16 compatible = "tronsmart,mxiii-plus", "amlogic,meson8m2";
26 stdout-path = "serial0:115200n8";
34 adc-keys {
35 compatible = "adc-keys";
36 io-channels = <&saradc 0>;
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H A Dmeson8b-ec100.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
22 stdout-path = "serial0:115200n8";
30 emmc_pwrseq: emmc-pwrseq {
31 compatible = "mmc-pwrseq-emm
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H A Dmeson8b-mxq.dts1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
22 stdout-path = "serial0:115200n8";
30 vcck: regulator-vcck {
31 compatible = "pwm-regulator";
33 regulator-name = "VCCK";
34 regulator-min-microvolt = <860000>;
35 regulator-max-microvolt = <1140000>;
37 pwm-supply = <&vcc_5v>;
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/freebsd-src/sys/contrib/device-tree/src/arm/st/
H A Dste-href.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2012 ST-Ericsson AB
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/leds/common.h>
8 #include "ste-href-family-pinctrl.dtsi"
17 compatible = "simple-battery";
18 battery-type = "lithium-ion-polymer";
21 thermal-zones {
22 battery-thermal {
24 polling-delay = <0>;
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/freebsd-src/sys/contrib/device-tree/src/riscv/starfive/
H A Djh7100-common.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/pinctrl/pinctrl-starfive-jh7100.h>
21 stdout-pat
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/freebsd-src/sys/contrib/dev/rtw88/
H A Dsdio.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
6 * Copyright(c) 2018-2019 Realtek Corporation
18 #include "sdio.h"
30 return !rtwsdio->irq_thread || in rtw_sdio_bus_claim_needed()
31 rtwsdio->irq_thread != current; in rtw_sdio_bus_claim_needed()
59 test_bit(RTW_FLAG_POWERON, rtwdev->flag in rtw_sdio_use_memcpy_io()
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/freebsd-src/sys/dev/ath/
H A Dah_osdep.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
14 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
18 * NO WARRANTY
22 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
79 * The hardware registers are native little-endian byte order.
80 * Big-endian hosts are handled by enabling hardware byte-swap
82 * domain registers are not byte swapped! Thus, on big-endian
83 * platforms we have to explicitly byte-swap those registers.
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