Home
last modified time | relevance | path

Searched +full:mtl +full:- +full:tx +full:- +full:config (Results 1 – 18 of 18) sorted by relevance

/freebsd-src/sys/contrib/device-tree/Bindings/net/
H A Dintel,dwmac-plat.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/intel,dwmac-plat.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vineetha G. Jaya Kumaran <vineetha.g.jaya.kumaran@intel.com>
17 - intel,keembay-dwmac
19 - compatible
22 - $ref: snps,dwmac.yaml#
27 - items:
28 - enum:
[all …]
H A Dsnps,dwmac.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Torgue <alexandre.torgue@foss.st.com>
11 - Giuseppe Cavallaro <peppe.cavallaro@st.com>
12 - Jos
[all...]
/freebsd-src/sys/contrib/device-tree/src/arm64/qcom/
H A Dsa8540p-ride.dts1 // SPDX-License-Identifier: BSD-3-Clause
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
13 #include "sa8540p-pmics.dtsi"
17 compatible = "qcom,sa8540p-rid
[all...]
H A Dsa8775p-ride.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include "sa8775p-ride.dtsi"
12 compatible = "qcom,sa8775p-ride", "qcom,sa8775p";
16 phy-mode = "sgmii";
20 phy-mode = "sgmii";
24 compatible = "snps,dwmac-mdi
[all...]
H A Dsa8155p-adp.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
9 #include <dt-bindings/gpio/gpio.h>
16 compatible = "qcom,sa8155p-adp", "qcom,sa8155p";
24 stdout-pat
[all...]
/freebsd-src/sys/contrib/device-tree/src/arm64/rockchip/
H A Drk3568.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
12 compatible = "rockchip,rk3568-dwc-ahci", "snps,dwc-ahci";
16 clock-names = "sata", "pmalive", "rxoob";
19 phy-names = "sata-phy";
20 ports-implemente
[all...]
H A Drk3588.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include "rk3588-extra.dtsi"
8 #include "rk3588-opp.dtsi"
H A Drk356x.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rk3568-cru.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/interrupt-controlle
[all...]
H A Drk3588s.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include "rk3588-base.dtsi"
8 #include "rk3588-opp.dtsi"
/freebsd-src/sys/contrib/device-tree/src/arm/axis/
H A Dartpec6.dtsi2 * Device Tree Source for the Axis ARTPEC-6 SoC
4 * This file is dual-licensed: you can use it either under the terms
43 #include <dt-bindings/interrupt-controller/arm-gic.h>
44 #include <dt-bindings/dma/nbpfaxi.h>
45 #include <dt-bindings/clock/axis,artpec6-clkctrl.h>
48 #address-cells = <1>;
49 #size-cells = <1>;
51 interrupt-parent = <&intc>;
54 #address-cells = <1>;
55 #size-cells = <0>;
[all …]
/freebsd-src/sys/dev/axgbe/
H A Dxgbe.h4 * Copyright (c) 2014-2016,2020 Advanced Micro Devices, Inc.
134 #define XGBE_DRV_NAME "amd-xgbe"
151 #define XGBE_TX_MAX_BUF_SIZE (0x3fff & ~(64 - 1))
157 * - Maximum number of SKB frags
158 * - Maximum descriptors for contiguous TSO/GSO packet
159 * - Possible context descriptor
160 * - Possible TSO header descriptor
174 /* DMA cache settings - Outer sharable, write-back, write-allocate */
178 /* DMA cache settings - System, no caches used */
182 /* DMA cache settings - PCI device */
[all …]
H A Dxgbe-dev.c4 * Copyright (c) 2014-2016,2020 Advanced Micro Devices, Inc.
116 #include "xgbe-common.h"
122 return (if_getmtu(pdata->netdev) + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN); in xgbe_get_max_frame()
131 rate = pdata->sysclk_rate; in xgbe_usec_to_riwt()
150 rate = pdata->sysclk_rate; in xgbe_riwt_to_usec()
170 pbl = pdata->pbl; in xgbe_config_pbl_val()
172 if (pdata->pbl > 32) { in xgbe_config_pbl_val()
177 for (i = 0; i < pdata->channel_count; i++) { in xgbe_config_pbl_val()
178 XGMAC_DMA_IOWRITE_BITS(pdata->channel[i], DMA_CH_CR, PBLX8, in xgbe_config_pbl_val()
181 if (pdata->channe in xgbe_config_pbl_val()
[all...]
/freebsd-src/sys/contrib/device-tree/src/arm/rockchip/
H A Drv1126.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rockchip,rv1126-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-binding
[all...]
/freebsd-src/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx8mp-evk.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/phy/phy-imx8-pcie.h>
13 compatible = "fsl,imx8mp-evk", "fsl,imx8mp";
16 stdout-path = &uart2;
19 backlight_lvds: backlight-lvd
[all...]
H A Dimx8mp-verdin.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
6 #include <dt-bindings/phy/phy-imx8-pcie.h>
7 #include <dt-bindings/pwm/pwm.h>
12 stdout-pat
[all...]
/freebsd-src/sys/contrib/device-tree/src/arm64/mediatek/
H A Dmt2712e.dtsi5 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/clock/mt2712-clk.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/arm-gi
[all...]
H A Dmt8195.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/clock/mt8195-clk.h>
9 #include <dt-bindings/gce/mt8195-gce.h>
10 #include <dt-bindings/interrupt-controlle
[all...]
/freebsd-src/sys/dev/eqos/
H A Dif_eqos.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
29 * $Id: eqos.c 1059 2022-12-08 19:32:32Z sos $
33 * DesignWare Ethernet Quality-of-Service controller
84 #define TX_QUEUED(h, t) ((((h) - (
[all...]