Searched +full:mt8192 +full:- +full:vdecsys_soc (Results 1 – 4 of 4) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/arm/mediatek/mediatek,mt8192-clock.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: MediaTek Functional Clock Controller for MT819210 - Chun-Jie Chen <chun-jie.chen@mediatek.com>13 The Mediatek functional clock controller provides various clocks on MT8192.18 - enum:19 - mediatek,mt8192-scp_adsp20 - mediatek,mt8192-imp_iic_wrap_c[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)4 ---5 $id: http://devicetree.org/schemas/media/mediatek,vcodec-subdev-decoder.yaml#6 $schema: http://devicetree.org/meta-schemas/core.yaml#11 - Yunfei Dong <yunfei.dong@mediatek.com>20 +------------------------------------------------+-------------------------------------+22 | input -> lat soc HW -> lat HW -> lat buffer --|--> lat buffer -> core HW -> output |24 +------------||-------------||-------------------+---------------------||--------------+26 -------------||-------------||-------------------|---------------------||---------------27 ||<------------||----------------HW index---------------->|| <child>[all …]
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)7 /dts-v1/;8 #include <dt-bindings/clock/mt8192-clk.h>9 #include <dt-bindings/gce/mt8192-gc1759 vdecsys_soc: clock-controller@1600f000 { global() label [all...]
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)7 /dts-v1/;8 #include <dt-bindings/clock/mt8195-clk.h>9 #include <dt-bindings/gce/mt8195-gce.h>10 #include <dt-bindings/interrupt-controlle2897 vdecsys_soc: clock-controller@1800f000 { global() label [all...]