Searched +full:mt8183 +full:- +full:rdma0 (Results 1 – 9 of 9) sorted by relevance
| /freebsd-src/sys/contrib/device-tree/Bindings/display/mediatek/ |
| H A D | mediatek,rdma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schema [all...] |
| H A D | mediatek,disp.txt | 29 - compatible: "mediatek,<chip>-disp-<function>", one of 30 "mediatek,<chip>-disp-ovl" - overlay (4 layers, blending, csc) 31 "mediatek,<chip>-disp-ovl-2l" - overlay (2 layers, blending, csc) 32 "mediatek,<chip>-disp-rdma" - read DMA / line buffer 33 "mediatek,<chip>-disp-wdma" - write DMA 34 "mediatek,<chip>-disp-ccorr" - color correction 35 "mediatek,<chip>-disp-color" - color processor 36 "mediatek,<chip>-disp-dither" - dither 37 "mediatek,<chip>-disp-aal" - adaptive ambient light controller 38 "mediatek,<chip>-disp-gamma" - gamma correction [all …]
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| /freebsd-src/sys/contrib/device-tree/Bindings/iommu/ |
| H A D | mediatek,iommu.txt | 6 ARM Short-Descriptor translation table format for address translation. 14 +--------+ 16 gals0-rx gals1-rx (Global Async Local Sync rx) 19 gals0-tx gals1-tx (Global Async Local Sync tx) 21 +--------+ 25 +----------------+------- 27 | gals-rx There may be GALS in some larbs. 30 | gals-tx 36 +-----+-----+ +----+----+ 40 OVL0 RDMA0 WDMA0 MC PP VLD [all …]
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| H A D | mediatek,iommu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Yong Wu <yong.wu@mediatek.com> 16 ARM Short-Descriptor translation table format for address translation. 24 +--------+ 26 gals0-rx gals1-rx (Global Async Local Sync rx) 29 gals0-tx gals1-tx (Global Async Local Sync tx) 31 +--------+ 35 +----------------+------- [all …]
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| /freebsd-src/sys/contrib/device-tree/src/arm64/mediatek/ |
| H A D | mt8183.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 #include <dt-bindings/clock/mt8183-clk.h> 9 #include <dt-bindings/gce/mt8183-gce.h> 10 #include <dt-binding 1749 rdma0: rdma@1400b000 { global() label [all...] |
| H A D | mt8186.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 * Author: Allen-KH Cheng <allen-kh.cheng@mediatek.com> 6 /dts-v1/; 7 #include <dt-binding 1786 rdma0: rdma@14007000 { global() label [all...] |
| H A D | mt8192.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 7 /dts-v1/; 8 #include <dt-bindings/clock/mt8192-clk.h> 9 #include <dt-bindings/gce/mt8192-gce.h> 10 #include <dt-bindings/interrupt-controlle 1517 rdma0: rdma@14007000 { global() label [all...] |
| H A D | mt6795.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/clock/mediatek,mt6795-clk.h> 12 #include <dt-bindings/gce/mediatek,mt6795-gce.h> 13 #include <dt-bindings/memory/mt6795-larb-port.h> 14 #include <dt-bindings/pinctrl/mt6795-pinfunc.h> 15 #include <dt-bindings/power/mt6795-power.h> 16 #include <dt-bindings/reset/mediatek,mt6795-resets.h> 20 interrupt-parent = <&sysirq>; [all …]
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| H A D | mt8195.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 7 /dts-v1/; 8 #include <dt-bindings/clock/mt8195-clk.h> 9 #include <dt-bindings/gce/mt8195-gce.h> 10 #include <dt-bindings/interrupt-controlle 3116 rdma0: rdma@1c002000 { global() label [all...] |