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/freebsd-src/sys/contrib/device-tree/Bindings/dma/
H A Darm-pl08x.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/arm-pl08x.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vinod Koul <vkoul@kernel.org>
13 - $ref: /schemas/arm/primecell.yaml#
14 - $ref: dma-controller.yaml#
22 - arm,pl080
23 - arm,pl081
25 - compatible
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H A Darm-pl08x.txt4 - compatible: "arm,pl080", "arm,primecell";
7 - arm,primecell-periphid: on the FTDMAC020 the primecell ID is not hard-coded
11 - reg: Address range of the PL08x registers
12 - interrupt: The PL08x interrupt number
13 - clocks: The clock running the IP core clock
14 - clock-names: Must contain "apb_pclk"
15 - lli-bus-interface-ahb1: if AHB master 1 is eligible for fetching LLIs
16 - lli-bus-interface-ahb2: if AHB master 2 is eligible for fetching LLIs
17 - mem-bus-interface-ahb1: if AHB master 1 is eligible for fetching memory contents
18 - mem-bus-interface-ahb2: if AHB master 2 is eligible for fetching memory contents
[all …]
H A Dlpc1850-dmamux.txt4 - compatible: "nxp,lpc1850-dmamux"
5 - reg: Memory map for accessing module
6 - #dma-cells: Should be set to <3>.
8 * 2nd cell contain the mux value (0-3) for the peripheral
11 - dma-requests: Number of DMA requests for the mux
12 - dma-masters: phandle pointing to the DMA controller
15 - dma-requests: Number of DMA requests the controller can handle
20 compatible = "nxp,lpc1850-gpdma", "arm,pl080", "arm,primecell";
21 arm,primecell-periphid = <0x00041080>;
25 clock-names = "apb_pclk";
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H A Dti-edma.txt8 ------------------------------------------------------------------------------
12 --------------------
13 - compatible: Should be:
14 - "ti,edma3-tpcc" for the channel controller(s) on OMAP,
16 - "ti,k2g-edma3-tpcc", "ti,edma3-tpcc" for the
18 - #dma-cells: Should be set to <2>. The first number is the DMA request
20 - reg: Memory map of eDMA CC
21 - reg-names: "edma3_cc"
22 - interrupts: Interrupt lines for CCINT, MPERR and CCERRINT.
23 - interrupt-names: "edma3_ccint", "edma3_mperr" and "edma3_ccerrint"
[all …]
/freebsd-src/sys/contrib/device-tree/Bindings/mtd/
H A Dmtd-physmap.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mtd/mtd-physmap.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: CFI or JEDEC memory-mapped NOR flash, MTD-RAM (NVRAM...)
10 - Rob Herring <robh@kernel.org>
17 - $ref: mtd.yaml#
18 - $ref: /schemas/memory-controllers/mc-peripheral-props.yaml#
23 - items:
24 - enum:
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H A Dmtd-physmap.txt1 CFI or JEDEC memory-mapped NOR flash, MTD-RAM (NVRAM...)
6 - compatible : should contain the specific model of mtd chip(s)
7 used, if known, followed by either "cfi-flash", "jedec-flash",
8 "mtd-ram" or "mtd-rom".
9 - reg : Address range(s) of the mtd chip(s)
11 non-identical chips can be described in one node.
12 - bank-width : Width (in bytes) of the bank. Equal to the
13 device width times the number of interleaved chips.
14 - device-width : (optional) Width of a single mtd chip. If
15 omitted, assumed to be equal to 'bank-width'.
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/freebsd-src/sys/contrib/device-tree/src/arm/marvell/
H A Darmada-39x.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
16 #address-cell
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H A Darmada-375.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
8 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/interrupt-controlle
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H A Dkirkwood.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/input/input.h>
3 #include <dt-bindings/gpio/gpio.h>
8 #address-cells = <1>;
9 #size-cells = <1>;
11 interrupt-parent = <&intc>;
14 #address-cells = <1>;
15 #size-cells = <0>;
22 clock-names = "cpu_clk", "ddrclk", "powersave";
33 compatible = "marvell,kirkwood-mbus", "simple-bus";
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H A Darmada-xp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
16 #include "armada-370-xp.dtsi"
19 #address-cells = <2>;
20 #size-cells = <2>;
23 compatible = "marvell,armadaxp", "marvell,armada-370-xp";
31 compatible = "marvell,armadaxp-mbus", "simple-bus";
38 internal-regs {
40 compatible = "marvell,armada-xp-sdram-controller";
[all …]
H A Darmada-38x.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/interrupt-controlle
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/freebsd-src/sys/contrib/ena-com/
H A Dena_com.c1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
4 * Copyright (c) 2015-2023 Amazon.com, Inc. or its affiliates.
39 /* Timeout in micro-sec */
94 /* Abort - canceled by the driver */
118 if (unlikely((addr & GENMASK_ULL(ena_dev->dma_addr_bits - in ena_com_mem_addr_set()
1640 u32 width; ena_com_get_dma_width() local
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/freebsd-src/sys/contrib/device-tree/src/arm/ti/keystone/
H A Dkeystone-k2g.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2017 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/pinctrl/keystone.h>
10 #include <dt-binding
[all...]
/freebsd-src/usr.sbin/i2c/
H A Di2c.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (C) 2008-2009 Semihalf, Michal Hajduk and Bartlomiej Sieka
53 const char *width; member
75 fprintf(stderr, "usage: %s -a addr [-f device] [- in usage()
285 encode_offset(const char * width,unsigned offset,uint8_t * dst,size_t * len) encode_offset() argument
550 unsigned bus; command_bus() local
551 const char *width = NULL; command_bus() local
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/freebsd-src/sys/contrib/device-tree/src/arm/st/
H A Dste-nomadik-stn8815.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree for the ST-Ericsson Nomadik 8815 STn8815 SoC
6 #include <dt-bindings/gpio/gpio.h>
9 #address-cells = <1>;
10 #size-cells = <1>;
18 L2: cache-controller {
19 compatible = "arm,l210-cache";
21 interrupt-parent = <&vica>;
23 cache-unified;
24 cache-level = <2>;
[all …]
/freebsd-src/sys/contrib/device-tree/src/arm/gemini/
H A Dgemini.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/clock/cortina,gemini-clock.h>
8 #include <dt-bindings/reset/cortina,gemini-reset.h>
9 #include <dt-bindings/gpio/gpio.h>
13 #address-cells = <1>;
14 #size-cells = <1>;
16 compatible = "simple-bus";
17 interrupt-parent = <&intcon>;
20 compatible = "cortina,gemini-flash", "cfi-flash";
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/freebsd-src/sys/contrib/dev/acpica/components/executer/
H A Dexregion.c3 * Module Name: exregion - ACPI default OpRegion (address space) handlers
11 * Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
28 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent
104 * re-exports any such software from a foreign destination, Licensee shall
105 * ensure that the distribution and export/re-export of the software is in
108 * any of its subsidiaries will export/re-export any technical data, process,
130 * 3. Neither the names of the above-listed copyright holders nor the names
165 * PARAMETERS: Function - Rea
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/freebsd-src/sys/dev/mmc/
H A Dmmc.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
35 * Group. This Simplified Specification is provided on a non-confidential
38 * Association, SD Group, SD-3C LLC or other third parties.
44 * is provided "AS-IS" without any representations or warranties of any
45 * kind. No responsibility is assumed by the SD Group, SD-3C LLC or the SD
47 * right of the SD Group, SD-
2464 mmc_read_ivar(device_t bus,device_t child,int which,uintptr_t * result) mmc_read_ivar() argument
2524 mmc_write_ivar(device_t bus,device_t child,int which,uintptr_t value) mmc_write_ivar() argument
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/freebsd-src/usr.sbin/bhyve/
H A Dpci_passthru.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
77 static int pcifd = -1;
134 if (caph_rights_limit(pcifd, &pcifd_rights) == -1) in pcifd_init()
139 if (caph_ioctls_limit(pcifd, pcifd_ioctls, nitems(pcifd_ioctls)) == -1) in pcifd_init()
147 pci_host_read_config(const struct pcisel *sel, long reg, int width) in pci_host_read_config() argument
158 pi.pi_width = width; in pci_host_read_config()
167 pci_host_write_config(const struct pcisel * sel,long reg,int width,uint32_t data) pci_host_write_config() argument
606 cfginit(struct pci_devinst * pi,int bus,int slot,int func) cfginit() argument
708 int bus, slot, func; passthru_legacy_config() local
791 passthru_lookup_pptdev(const char * name,int * bus,int * slot,int * func) passthru_lookup_pptdev() argument
859 int bus, slot, func, error, memflags; passthru_init() local
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/freebsd-src/sys/dev/proto/
H A Dproto_core.c1 /*-
29 #include <sys/bus.h>
41 #include <machine/bus.h>
97 if (sc->sc_rescnt == PROTO_RES_MAX) in proto_add_resource()
100 r = sc->sc_res + sc->sc_rescnt++; in proto_add_resource()
101 r->r_type = type; in proto_add_resource()
102 r->r_rid = rid; in proto_add_resource()
103 r->r_d.res = res; in proto_add_resource()
136 if ((ep - dn) > pfxlen && in proto_probe()
152 if ((ep - dn) > pfxlen && in proto_probe()
[all …]
/freebsd-src/sys/arm/broadcom/bcm2835/
H A Dbcm2835_mbox.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
31 #include <sys/bus.h>
38 #include <machine/bus.h>
65 mtx_lock(&(sc)->lock); \
69 mtx_unlock(&(sc)->lock); \
91 bus_space_read_4((sc)->bst, (sc)->bsh, reg)
93 bus_space_write_4((sc)->bst, (sc)->bsh, reg, val)
96 {"broadcom,bcm2835-mbox", 1},
97 {"brcm,bcm2835-mbox", 1},
[all …]
/freebsd-src/sys/dev/bhnd/bhndb/
H A Dbhndb_pci.c1 /*-
2 * Copyright (c) 2015-2016 Landon Fuller <landon@landonf.org>
36 * PCI-specific implementation for the BHNDB bridge driver.
38 * Provides support for bridging from a PCI parent bus to a BHND-compatible
39 * bus (e.g. bcma or siba) via a Broadcom PCI core configured in end-point
42 * This driver handles all initial generic host-level PCI interactions with a
44 * bus has been enumerated, this driver works in tandem with a core-specifi
708 bhndb_pci_write_core(struct bhndb_pci_softc * sc,bus_size_t offset,uint32_t value,u_int width) bhndb_pci_write_core() argument
744 bhndb_pci_read_core(struct bhndb_pci_softc * sc,bus_size_t offset,u_int width) bhndb_pci_read_core() argument
1585 bhndb_pci_probe_write(struct bhndb_pci_probe * probe,bhnd_addr_t addr,bhnd_size_t offset,uint32_t value,u_int width) bhndb_pci_probe_write() argument
1628 bhndb_pci_probe_read(struct bhndb_pci_probe * probe,bhnd_addr_t addr,bhnd_size_t offset,u_int width) bhndb_pci_probe_read() argument
1715 bhndb_pci_eio_read(struct bhnd_erom_io * eio,bhnd_size_t offset,u_int width) bhndb_pci_eio_read() argument
[all...]
/freebsd-src/sys/contrib/device-tree/src/riscv/starfive/
H A Djh7110.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
8 #include <dt-bindings/clock/starfive,jh7110-crg.h>
9 #include <dt-bindings/power/starfive,jh7110-pmu.h>
10 #include <dt-bindings/reset/starfive,jh7110-cr
[all...]
/freebsd-src/sys/dev/aic7xxx/
H A Daic7xxx_osm.c1 /*-
2 * Bus independent FreeBSD shim for the aic7xxx based Adaptec SCSI controllers
4 * Copyright (c) 1994-2001 Justin T. Gibbs.
75 path_id = cam_sim_path(ahc->platform_data->sim_b); in ahc_create_path()
77 path_id = cam_sim_path(ahc->platform_data->sim); in ahc_create_path()
91 shareable = (ahc->flags & AHC_EDGE_INTERRUPT) ? 0: RF_SHAREABLE; in ahc_map_int()
92 ahc->platform_data->irq = in ahc_map_int()
93 bus_alloc_resource_any(ahc->dev_softc, SYS_RES_IRQ, &zero, in ahc_map_int()
95 if (ahc->platform_data->irq == NULL) { in ahc_map_int()
96 device_printf(ahc->dev_softc, in ahc_map_int()
[all …]
/freebsd-src/sys/dev/e1000/
H A De1000_vf.c2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
56 * e1000_init_phy_params_vf - Inits PHY params
59 * Doesn't do much - there's no PHY available to the VF.
64 hw->phy.type = e1000_phy_vf; in e1000_init_phy_params_vf()
65 hw->phy.ops.acquire = e1000_acquire_vf; in e1000_init_phy_params_vf()
66 hw->phy.ops.release = e1000_release_vf; in e1000_init_phy_params_vf()
72 * e1000_init_nvm_params_vf - Inits NVM params
75 * Doesn't do much - there's no NVM available to the VF.
80 hw->nvm.type = e1000_nvm_none; in e1000_init_nvm_params_vf()
[all …]

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