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/freebsd-src/sys/contrib/device-tree/Bindings/mailbox/
H A Dti,omap-mailbox.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mailbox/ti,omap-mailbox.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Suman Anna <s-anna@ti.com>
26 interrupt configuration registers, and have a rx and tx interrupt source per
28 appropriate programming of the rx and tx interrupt sources on the appropriate
35 lines can also be routed to different processor sub-systems on DRA7xx as they
49 within a SoC. The sub-mailboxes (actual communication channels) are
56 "mbox-names" (please see Documentation/devicetree/bindings/mailbox/mailbox.txt
[all …]
H A Domap-mailbox.txt17 and tx interrupt source per h/w fifo. Communication between different processors
18 is achieved through the appropriate programming of the rx and tx interrupt
25 routed to different processor sub-systems on DRA7xx as they are routed through
38 a SoC. The sub-mailboxes are represented as child nodes of this parent node.
41 --------------------
42 - compatible: Should be one of the following,
43 "ti,omap2-mailbox" for OMAP2420, OMAP2430 SoCs
44 "ti,omap3-mailbox" for OMAP3430, OMAP3630 SoCs
45 "ti,omap4-mailbox" for OMAP44xx, OMAP54xx, AM33xx,
47 "ti,am654-mailbox" for K3 AM65x and J721E SoCs
[all …]
H A Dhisilicon,hi6220-mailbox.txt13 --------------------
14 - compatible: Shall be "hisilicon,hi6220-mbox"
15 - reg: Contains the mailbox register address range (base
19 - #mbox-cells: Common mailbox binding property to identify the number
23 slot_id: Slot id used either for TX or RX
26 TX/RX interrupt to application processor,
28 - interrupts: Contains the interrupt information for the mailbox
33 --------------------
34 - hi6220,mbox-tx-noirq: Property of MCU firmware's feature, so mailbox driver
36 flag" mode or IRQ generated mode to acknowledge a TX
[all …]
H A Dst,stm32-ipcc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mailbox/st,stm32-ipcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
16 - Fabien Dessenne <fabien.dessenne@foss.st.com>
17 - Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
21 const: st,stm32mp1-ipcc
31 - description: rx channel occupied
32 - description: tx channel free
34 interrupt-names:
[all …]
H A Darm,mhuv2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tushar Khandelwal <tushar.khandelwal@arm.com>
11 - Viresh Kumar <viresh.kumar@linaro.org>
15 between 1 and 124 channel windows (each 32-bit wide) to provide unidirectional
33 - Data-transfer: Each transfer is made of one or more words, using one or more
36 - Doorbell: Each transfer is made up of single bit flag, using any one of the
49 - arm,mhuv2-tx
50 - arm,mhuv2-rx
[all …]
H A Dxlnx,zynqmp-ipi-mailbox.txt8 +-------------------------------------+
10 +-------------------------------------+
11 +--------------------------------------------------+
15 +--------------------------+ |
18 +--------------------------------------------------+
19 +------------------------------------------+
20 | +----------------+ +----------------+ |
24 | +----------------+ +----------------+ |
27 +------------------------------------------+
33 --------------------
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/freebsd-src/sys/contrib/device-tree/src/arm64/ti/
H A Dk3-am68-sk-som.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/
6 /dts-v1/;
8 #include "k3-j721s2.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
14 bootph-al
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H A Dk3-am642-tqma64xxl.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
4 * Copyright (c) 2022-2024 TQ-Systems GmbH <linux@ew.tq-group.com>, D-82229 Seefeld, Germany.
7 #include "k3-am64
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H A Dk3-j721e-som-p0.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Copyright (C) 2019-2024 Texas Instruments Incorporated - https://www.ti.com/
8 /dts-v1/;
10 #include "k3-j721e.dtsi"
15 bootph-all;
21 reserved_memory: reserved-memor
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H A Dk3-j721s2-som-p0.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/
8 /dts-v1/;
10 #include "k3-j721s2.dtsi"
11 #include <dt-bindings/gpio/gpio.h>
16 bootph-al
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H A Dk3-j784s4-evm.dts1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/
8 /dts-v1/;
10 #include <dt-bindings/net/ti-dp83867.h>
11 #include <dt-binding
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H A Dk3-am69-sk.dts1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/
9 /dts-v1/;
11 #include <dt-bindings/net/ti-dp83867.h>
12 #include <dt-binding
[all...]
H A Dk3-am64-phycore-som.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Copyright (C) 2021-2024 PHYTEC America, LLC - https://www.phytec.com
6 * Copyright (C) 2022-2024 PHYTEC Messtechnik GmbH
10 * https://www.phytec.com/product/phycore-am64x
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-binding
[all...]
H A Dk3-j721e-beagleboneai64.dts1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * https://beagleboard.org/ai-64
4 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/
5 * Copyright (C) 2022-2024 Jason Kridner, BeagleBoard.org Foundation
6 * Copyright (C) 2022-2024 Robert Nelson, BeagleBoard.org Foundation
9 /dts-v
[all...]
H A Dk3-j7200-som-p0.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
10 #include "k3-j7200.dtsi"
15 bootph-al
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H A Dk3-j721e-sk.dts1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/
5 * J721E SK URL: https://www.ti.com/tool/SK-TDA4VM
8 /dts-v1/;
10 #include "k3-j721e.dtsi"
11 #include <dt-binding
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/freebsd-src/sys/contrib/device-tree/src/arm/ti/omap/
H A Domap2420.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
15 compatible = "ti,omap2-l4", "simple-bus";
16 #address-cells = <1>;
17 #size-cells = <1>;
21 compatible = "ti,omap2-prcm";
25 #address-cells = <1>;
26 #size-cells = <0>;
34 compatible = "ti,omap2-scm", "simple-bus";
36 #address-cells = <1>;
[all …]
H A Ddra72x.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/
20 compatible = "arm,cortex-a15-pmu";
21 interrupt-parent = <&wakeupgen>;
27 target-module@5b000 { /* 0x4845b000, ap 59 46.0 */
28 compatible = "ti,sysc-omap4", "ti,sysc";
31 reg-names = "rev", "sysc";
32 ti,sysc-midle = <SYSC_IDLE_FORCE>,
34 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
37 clock-names = "fck";
[all …]
H A Ddra74x.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/
16 compatible = "arm,cortex-a15";
18 operating-points-v2 = <&cpu0_opp_table>;
21 clock-names = "cpu";
23 clock-latency = <300000>; /* From omap-cpufreq driver */
26 #cooling-cells = <2>; /* min followed by max */
28 vbb-supply = <&abb_mpu>;
40 compatible = "arm,cortex-a15-pmu";
41 interrupt-parent = <&wakeupgen>;
[all …]
H A Domap2430.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
15 compatible = "ti,omap2-l4-wkup", "simple-bus";
16 #address-cells = <1>;
17 #size-cells = <1>;
21 compatible = "ti,omap2-prcm";
25 #address-cells = <1>;
26 #size-cells = <0>;
34 compatible = "ti,omap2-scm", "simple-bus";
36 #address-cells = <1>;
[all …]
/freebsd-src/sys/contrib/device-tree/Bindings/firmware/
H A Darm,scmi.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Sudee
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/freebsd-src/sys/contrib/device-tree/Bindings/dsp/
H A Dfsl,dsp.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Daniel Baluta <daniel.baluta@nxp.com>
11 - Shengjiu Wang <shengjiu.wang@nxp.com>
15 advanced pre- and post- audio processing.
20 - fsl,imx8qxp-dsp
21 - fsl,imx8qm-dsp
22 - fsl,imx8mp-dsp
23 - fsl,imx8ulp-dsp
[all …]
/freebsd-src/sys/contrib/device-tree/Bindings/serial/
H A Dnvidia,tegra194-tcu.txt4 systems within the Tegra SoC. It is implemented through a mailbox-
10 - name : Should be tcu
11 - compatible
14 - "nvidia,tegra194-tcu"
15 - mbox-names:
16 "rx" - Mailbox for receiving data from hardware UART
17 "tx" - Mailbox for transmitting data to hardware UART
18 - mboxes: Mailboxes corresponding to the mbox-names.
24 - .../mailbox/mailbox.txt
25 - .../mailbox/nvidia,tegra186-hsp.txt
[all …]
H A Dnvidia,tegra194-tcu.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/serial/nvidia,tegra194-tcu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jonathan Hunter <jonathanh@nvidia.com>
15 systems within the Tegra SoC. It is implemented through a mailbox-
26 - const: nvidia,tegra194-tcu
27 - items:
28 - enum:
[all …]
/freebsd-src/sys/contrib/device-tree/Bindings/arm/keystone/
H A Dti,sci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schema
[all...]

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