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/freebsd-src/sys/contrib/device-tree/Bindings/input/
H A Dazoteq,iqs7222.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schema
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H A Diqs269a.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jeff LaBundy <jeff@labundy.com>
13 - $ref: input.yaml#
16 The Azoteq IQS269A is an 8-channel capacitive touch controller that features
17 additional Hall-effect and inductive sensing capabilities.
24 - azoteq,iqs269a
25 - azoteq,iqs269a-00
26 - azoteq,iqs269a-d0
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/freebsd-src/sys/contrib/device-tree/Bindings/input/touchscreen/
H A Dazoteq,iqs7211.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schema
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/freebsd-src/sys/contrib/dev/iwlwifi/fw/api/
H A Dlocation.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2015-2017 Intel Deutschland GmbH
4 * Copyright (C) 2018-2022 Intel Corporation
11 * enum iwl_location_subcmd_ids - location group command IDs
86 * struct iwl_tof_config_cmd - ToF configuration
88 * @one_sided_disabled: indicates if one-side
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/freebsd-src/sys/contrib/dev/iwlwifi/fw/
H A Dfile.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2008-2014, 2018-2024 Intel Corporation
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5 * Copyright (C) 2016-2017 Intel Deutschland GmbH
55 IWL_UCODE_TLV_PAN = 7, /* deprecated -
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/freebsd-src/sys/contrib/dev/athk/ath10k/
H A Dwmi.h1 /* SPDX-License-Identifier: ISC */
3 * Copyright (c) 2005-2011 Atheros Communications Inc.
4 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
5 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
28 * 1. Add new WMI commands ONLY within the specified range - 0x9000 - 0x9fff
44 * variable is already 4-byte aligned by virtue of being a u32
526 * for wmi_services is 64 as target is using only 4-bits of each 32-bit
532 __le32_to_cpu((wmi_svc_bmap)[((svc_id) - (len)) / 28]) & \
533 BIT(((((svc_id) - (len)) % 28) & 0x1f) + 4))
1159 /** DFS-specific commands */
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H A Dtargaddrs.h1 /* SPDX-License-Identifier: ISC */
3 * Copyright (c) 2005-2011 Atheros Communications Inc.
4 * Copyright (c) 2011-2016 Qualcomm Atheros, Inc.
36 * Pointer to application-defined area, if any.
50 * General-purpose flag bits, similar to SOC_OPTION_* flags.
103 u32 hi_num_bpatch_streams; /* 0x70 -- unused */
124 * 0xa8 - [1]: 0 = UART FC active low, 1 = UART FC active high
125 * [31:16]: wakeup timeout in ms
143 /* 0xbc - [31:0]: idle timeout in ms */
150 /* If non-zero, override values sent to Host in WMI_READY event. */
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/freebsd-src/sys/dev/bnxt/bnxt_re/
H A Dbnxt_re.h2 * Copyright (c) 2015-2024, Broadcom. All rights reserved. The term
99 * min_not_zero - return the minimum that is _not_ zero, unless both are zero
143 * the default timeout is approx. 260ms(4 usec * 2 ^(timeout))
165 ((rdev)->chip_ctx->hwrm_cmd_max_timeout * 1000)
184 #define BNXT_RE_MSIX_FROM_MOD_PARAM -1
219 #define BNXT_RE_RECOVERY_IB_UNINIT_WAIT_TIME_MS 30000 /* 30sec timeout */
390 spin_lock(&(_rdev)->res_lis
976 bnxt_re_fill_fw_msg(struct bnxt_fw_msg * fw_msg,void * msg,int msg_len,void * resp,int resp_max_len,int timeout) bnxt_re_fill_fw_msg() argument
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/freebsd-src/sys/dev/msk/
H A Dif_mskreg.h17 * are provided to you under the BSD-type license terms provided
22 * - Redistributions of source code must retain the above copyright
24 * - Redistributions in binary form must reproduce the above
28 * - Neither the name of Marvell nor the names of its contributors
48 /*-
49 * SPDX-License-Identifier: BSD-4-Clause AND BSD-3-Clause
65 * 4. Neither the name of the author nor the names of any co-contributors
82 /*-
110 * D-Link PCI vendor ID
154 * D-Link gigabit ethernet device ID
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/freebsd-src/sys/contrib/dev/ath/ath_hal/ar9300/
H A Dar9300_xmit.c46 if (AH9300(ah)->ah_tx_trig_level >= MAX_TX_FIFO_THRESHOLD && in ar9300_update_tx_trig_level()
55 omask = ar9300_set_interrupts(ah, ahp->ah_mask_reg &~ HAL_INT_GLOBAL, 0); in ar9300_update_tx_trig_level()
58 cur_level = MS(txcfg, AR_FTRIG); in ar9300_update_tx_trig_level()
66 new_level--; in ar9300_update_tx_trig_level()
75 /* re-enable chip interrupts */ in ar9300_update_tx_trig_level()
78 AH9300(ah)->ah_tx_trig_level = new_level; in ar9300_update_tx_trig_level()
89 return (AH9300(ah)->ah_tx_trig_level); in ar9300_get_tx_trig_level()
100 HAL_CAPABILITIES *p_cap = &AH_PRIVATE(ah)->ah_caps; in ar9300_set_tx_queue_props()
102 if (q >= p_cap->halTotalQueues) { in ar9300_set_tx_queue_props()
106 return ath_hal_setTxQProps(ah, &ahp->ah_txq[q], q_info); in ar9300_set_tx_queue_props()
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H A Dar9300_mci.c73 if (!(ah->ah_config.ath_hal_mci_config & in ar9300_mci_osla_setup()
80 thresh = MS(ah->ah_config.ath_hal_mci_config, in ar9300_mci_osla_setup()
147 time_out -= 10; in ar9300_mci_wait_for_interrupt()
155 "(MCI) %s: Wait for Reg0x%08x = 0x%08x timeout.\n", in ar9300_mci_wait_for_interrupt()
219 if ((ahp->ah_mci_coex_bt_version_known == AH_FALSE) && in ar9300_mci_send_coex_version_query()
220 (ahp->ah_mci_bt_state != MCI_BT_SLEEP)) { in ar9300_mci_send_coex_version_query()
238 ahp->ah_mci_coex_major_version_wlan; in ar9300_mci_send_coex_version_response()
240 ahp->ah_mci_coex_minor_version_wlan; in ar9300_mci_send_coex_version_response()
248 u_int32_t *payload = &ahp->ah_mci_coex_wlan_channels[0]; in ar9300_mci_send_coex_wlan_channels()
250 if ((ahp->ah_mci_coex_wlan_channels_update == AH_TRUE) && in ar9300_mci_send_coex_wlan_channels()
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/freebsd-src/contrib/wpa/src/common/
H A Dwpa_ctrl.h3 * Copyright (c) 2004-2017, Jouni Malinen <j@w1.fi>
16 /* wpa_supplicant control interface - fixed message prefixes */
19 #define WPA_CTRL_REQ "CTRL-REQ-"
22 #define WPA_CTRL_RSP "CTRL-RSP-"
26 #define WPA_EVENT_CONNECTED "CTRL-EVENT-CONNECTED "
28 #define WPA_EVENT_DISCONNECTED "CTRL-EVENT-DISCONNECTE
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H A Dqca-vendor.h3 * Copyright (c) 2014-2017, Qualcomm Atheros, Inc.
4 * Copyright (c) 2018-2020, The Linux Foundation
5 * Copyright (c) 2021-2023, Qualcomm Innovation Center, Inc.
28 * enum qca_radiotap_vendor_ids - QCA radiotap vendor namespace IDs
35 * DOC: TX/RX NSS and chain configurations
39 * receiving (RX) the data.
41 * Global NSS configuration - Applies to all bands (2.4 GHz and 5/6 GHz)
62 * Per band NSS configuration - Applies to the 2.4 GHz or 5/6 GHz band
79 * Global chain configuration - Applies to all bands (2.4 GHz and 5/6 GHz)
96 * Per band chain configuration - Applie
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/freebsd-src/sys/contrib/device-tree/src/arm64/qcom/
H A Dsdm845-oneplus-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
10 #include <dt-bindings/input/linux-event-codes.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/regulator/qcom,rpmh-regulato
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/freebsd-src/sys/dev/neta/
H A Dif_mvnetavar.h35 #define MVNETA_A370_MAX_CSUM_MTU 1600 /* Max frame len for TX csum */
61 bus_read_4((sc)->res[0], (reg))
63 bus_write_4((sc)->res[0], (reg), (val))
66 bus_read_region_4((sc)->res[0], (reg), (val), (c))
68 bus_write_region_4((sc)->res[0], (reg), (val), (c))
71 bus_read_4((sc)->res[0], MVNETA_PORTMIB_BASE + (reg))
92 * the ethernet device has 8 rx/tx DMA queues. each of queue has its own
113 /* Virtual address of the RX buffer */
161 #define MVNETA_WATCHDOG_TXCOMP (hz / 10) /* 100ms */
181 ctr -= MVNETA_TX_RING_CNT; in tx_counter_adv()
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/freebsd-src/sys/dev/liquidio/base/
H A Dlio_device.c76 /* Max Txqs: Half for each of the two ports :max_iq/2 */
82 /* Max Rxqs: Half for each of the two ports :max_oq/2 */
88 /* Num of desc for rx rings */
106 /* Max Txqs: Half for each of the two ports :max_iq/2 */
112 /* Max Rxqs: Half for each of the two ports :max_oq/2 */
118 /* Num of desc for rx rings */
165 "BEGIN", "PCI-ENABLE-DONE", "PCI-MAP-DONE", "DISPATCH-INIT-DONE",
166 "IQ-INIT-DONE", "SCBUFF-POOL-INIT-DONE", "RESPLIST-INIT-DONE",
167 "DROQ-INIT-DONE", "MBOX-SETUP-DONE", "MSIX-ALLOC-VECTOR-DONE",
168 "INTR-SET-DONE", "IO-QUEUES-INIT-DONE", "CONSOLE-INIT-DONE",
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/freebsd-src/sys/net80211/
H A Dieee80211_mesh.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
103 * Timeout values come from the specification and are in milliseconds.
107 static int ieee80211_mesh_gateint = -1;
111 "mesh gate interval (ms)");
112 static int ieee80211_mesh_retrytimeout = -1;
116 "Retry timeout (mse
183 mesh_rt_find_locked(struct ieee80211_mesh_state * ms,const uint8_t dest[IEEE80211_ADDR_LEN]) mesh_rt_find_locked() argument
201 struct ieee80211_mesh_state *ms = vap->iv_mesh; mesh_rt_add_locked() local
228 struct ieee80211_mesh_state *ms = vap->iv_mesh; ieee80211_mesh_rt_find() local
241 struct ieee80211_mesh_state *ms = vap->iv_mesh; ieee80211_mesh_rt_add() local
306 struct ieee80211_mesh_state *ms = vap->iv_mesh; ieee80211_mesh_proxy_check() local
349 mesh_rt_del(struct ieee80211_mesh_state * ms,struct ieee80211_mesh_route * rt) mesh_rt_del() argument
366 struct ieee80211_mesh_state *ms = vap->iv_mesh; ieee80211_mesh_rt_del() local
390 struct ieee80211_mesh_state *ms = vap->iv_mesh; ieee80211_mesh_rt_flush() local
405 struct ieee80211_mesh_state *ms = vap->iv_mesh; ieee80211_mesh_rt_flush_peer() local
423 struct ieee80211_mesh_state *ms = vap->iv_mesh; mesh_rt_flush_invalid() local
482 struct ieee80211_mesh_state *ms = vap->iv_mesh; mesh_select_proto_path() local
497 struct ieee80211_mesh_state *ms = vap->iv_mesh; mesh_select_proto_metric() local
512 struct ieee80211_mesh_state *ms = vap->iv_mesh; mesh_gatemode_setup() local
533 struct ieee80211_mesh_state *ms = vap->iv_mesh; mesh_gatemode_cb() local
643 struct ieee80211_mesh_state *ms = vap->iv_mesh; mesh_vdetach() local
658 struct ieee80211_mesh_state *ms; mesh_vattach() local
693 struct ieee80211_mesh_state *ms = vap->iv_mesh; mesh_newstate() local
849 struct ieee80211_mesh_state *ms = vap->iv_mesh; mesh_rt_cleanup_cb() local
865 struct ieee80211_mesh_state *ms = vap->iv_mesh; ieee80211_mesh_mark_gate() local
901 struct ieee80211_mesh_state *ms = vap->iv_mesh; mesh_linkchange() local
1071 struct ieee80211_mesh_state *ms = vap->iv_mesh; ieee80211_mesh_forward_to_gates() local
1145 struct ieee80211_mesh_state *ms = vap->iv_mesh; mesh_forward() local
1374 struct ieee80211_mesh_state *ms = vap->iv_mesh; mesh_recv_indiv_data_to_fwrd() local
1432 struct ieee80211_mesh_state *ms = vap->iv_mesh; mesh_recv_indiv_data_to_me() local
1499 struct ieee80211_mesh_state *ms = vap->iv_mesh; mesh_recv_group_data() local
1833 struct ieee80211_mesh_state *ms = vap->iv_mesh; mesh_recv_mgmt() local
2239 struct ieee80211_mesh_state *ms = vap->iv_mesh; mesh_recv_action_meshpeering_open() local
2564 struct ieee80211_mesh_state *ms = vap->iv_mesh; mesh_recv_action_meshgate() local
3084 struct ieee80211_mesh_state *ms = vap->iv_mesh; mesh_verify_meshid() local
3099 const struct ieee80211_mesh_state *ms = vap->iv_mesh; mesh_verify_meshconf() local
3188 struct ieee80211_mesh_state *ms = vap->iv_mesh; ieee80211_add_meshid() local
3206 const struct ieee80211_mesh_state *ms = vap->iv_mesh; ieee80211_add_meshconf() local
3369 struct ieee80211_mesh_state *ms = vap->iv_mesh; ieee80211_mesh_node_cleanup() local
3411 struct ieee80211_mesh_state *ms = vap->iv_mesh; mesh_ioctl_get80211() local
3519 struct ieee80211_mesh_state *ms = vap->iv_mesh; mesh_ioctl_set80211() local
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/freebsd-src/sys/dev/ae/
H A Dif_aereg.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
55 #define AE_ISR_DMAR_TIMEOUT 0x00000200 /* DMA read timeout. */
56 #define AE_ISR_DMAW_TIMEOUT 0x00000400 /* DMA write timeout. */
59 #define AE_ISR_RXD_UPDATED 0x00020000 /* Rx status updated. */
84 #define AE_EADDR0_REG 0x1488 /* 5 - 2 bytes */
85 #define AE_EADDR1_REG 0x148c /* 1 - 0 bytes */
89 * L2 supports 64-bit addressing but all rings base addresses
97 Should be 120-byte aligned (i.e.
99 have 128-byte alignment). */
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/freebsd-src/sys/contrib/device-tree/src/arm/marvell/
H A Dmmp2-olpc-xo-1-75.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/linux-event-codes.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/clock/marvell,mmp2-audio.h>
16 model = "OLPC XO-1.75";
17 compatible = "olpc,xo-1.75", "mrvl,mmp2";
20 #address-cells = <1>;
21 #size-cells = <1>;
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/freebsd-src/contrib/libfido2/src/fido/
H A Dtypes.h2 * Copyright (c) 2018-2022 Yubico AB. All rights reserved.
3 * SPDX-License-Identifier: BSD-2-Clause
61 fido_dev_rx_t *rx; member
87 /* COSE ES256 (ECDSA over P-256 with SHA-256) public key */
93 /* COSE ES256 (ECDSA over P-256 with SHA-256) (secret) key */
98 /* COSE ES384 (ECDSA over P-384 with SHA-384) public key */
104 /* COSE RS256 (2048-bit RSA with PKCS1 padding and SHA-256) public key */
145 fido_blob_t cbor; /* cbor-encoded attestation statement */
181 fido_blob_t authdata_cbor; /* cbor-encoded payload */
182 fido_blob_t authdata_raw; /* cbor-decoded payload */
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/freebsd-src/sys/contrib/dev/athk/ath11k/
H A Ddebugfs_htt_stats.h1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
253 * The histogram bins are 0-29, 30-59, 60-89 and so on. The are
465 /* element 0,1, ...7 -> NSS 1,2, ...8 */
473 * (400us, 800us, 1600us & 3200us) in each mcs (0-11)
492 /* Number of rx ldpc packets */
494 /* Number of rx rts packets */
501 /* element 0,1, ...7 -> NSS 1,2, ...8 */
512 /* Counters to track number of rx packets in each GI in each mcs (0-11) */
595 /* histogram of ppdu post to hwsch - > cmd status received */
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/freebsd-src/sys/dev/usb/serial/
H A Dumcs.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
34 #define UMCS7840_CTRL_TIMEOUT 500 /* ms */
50 #define MCS7840_DEV_REG_PINPONGHIGH 0x02 /* High bits of ping-pong
52 #define MCS7840_DEV_REG_PINPONGLOW 0x03 /* Low bits of ping-pong
67 #define MCS7840_DEV_REG_PLL_DIV_M 0x0e /* Pre-diviedr for PLL, R/W */
78 /* DCRx_2-DCRx_4 Registers goes here (see below, they are documented) */
105 #define MCS7840_DEV_REG_RX_SAMPLING12 0x30 /* RX sampling for ports 1 &
107 #define MCS7840_DEV_REG_RX_SAMPLING34 0x31 /* RX sampling for ports 3 &
109 #define MCS7840_DEV_REG_BI_FIFO_STAT1 0x32 /* Bulk-In FIFO Stat for Port
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/freebsd-src/sys/dev/ath/ath_hal/ar5416/
H A Dar5416_cal.c1 /*-
2 * SPDX-License-Identifier: ISC
4 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
5 * Copyright (c) 2002-2008 Atheros Communications, Inc.
61 * Analog-to-Digital Converters."
67 struct ar5416PerCal *cal = &AH5416(ah)->ah_cal; in ar5416IsCalSupp()
69 switch (calType & cal->suppCals) { in ar5416IsCalSupp()
71 /* Run IQ Mismatch for non-CCK only */ in ar5416IsCalSupp()
79 * in HT20 - only one ADC is used. in ar5416IsCalSupp()
102 currCal->calData->calCountMax); in ar5416SetupMeasurement()
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/freebsd-src/sys/dev/usb/wlan/
H A Dif_rsu.c3 /*-
23 * o tx a-mpdu
25 * o power-save operation
79 device_printf((_sc)->sc_dev, __VA_ARGS__); \
290 /* XXX hard-coded */
316 .timeout = RSU_TX_TIMEOUT
329 .timeout = RSU_TX_TIMEOUT
342 .timeout = RSU_TX_TIMEOUT
351 if (uaa->usb_mode != USB_MODE_HOST || in rsu_match()
352 uaa->inf in rsu_match()
3757 rsu_ms_delay(struct rsu_softc * sc,int ms) rsu_ms_delay() argument
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/freebsd-src/sys/dev/ath/ath_hal/ar5210/
H A Dar5210_reset.c1 /*-
2 * SPDX-License-Identifier: ISC
4 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
5 * Copyright (c) 2002-2004 Atheros Communications, Inc.
51 * on the host machine (don't know--the problem was identified
78 const HAL_EEPROM_v1 *ee = AH_PRIVATE(ah)->ah_eeprom; in ar5210Reset()
86 opmode, chan->ic_freq, chan->ic_flags, in ar5210Reset()
101 __func__, chan->ic_freq, chan->ic_flags); in ar5210Reset()
126 OS_REG_WRITE(ah, AR_STA_ID0, LE_READ_4(ahp->ah_macaddr)); in ar5210Reset()
127 OS_REG_WRITE(ah, AR_STA_ID1, LE_READ_2(ahp->ah_macaddr + 4)); in ar5210Reset()
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