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/freebsd-src/sys/contrib/device-tree/Bindings/display/bridge/
H A Drenesas,lvds.txt1 Renesas R-Car LVDS Encoder
4 These DT bindings describe the LVDS encoder embedded in the Renesas R-Car
5 Gen2, R-Car Gen3 and RZ/G SoCs.
9 - compatible : Shall contain one of
10 - "renesas,r8a7743-lvds" for R8A7743 (RZ/G1M) compatible LVDS encoders
11 - "renesas,r8a7744-lvds" for R8A7744 (RZ/G1N) compatible LVDS encoders
12 - "renesas,r8a774a1-lvds" for R8A774A1 (RZ/G2M) compatible LVDS encoders
13 - "renesas,r8a774b1-lvds" for R8A774B1 (RZ/G2N) compatible LVDS encoders
14 - "renesas,r8a774c0-lvds" for R8A774C0 (RZ/G2E) compatible LVDS encoders
15 - "renesas,r8a7790-lvds" for R8A7790 (R-Car H2) compatible LVDS encoders
[all …]
H A Drenesas,lvds.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/renesas,lvds.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car LVDS Encoder
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
13 These DT bindings describe the LVDS encoder embedded in the Renesas R-Car
14 Gen2, R-Car Gen3, RZ/G1 and RZ/G2 SoCs.
19 - renesas,r8a7742-lvds # for RZ/G1H compatible LVDS encoders
20 - renesas,r8a7743-lvds # for RZ/G1M compatible LVDS encoders
[all …]
H A Dlvds-codec.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/lvds-codec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Transparent LVDS encoder
[all...]
/freebsd-src/sys/contrib/device-tree/src/arm/nvidia/
H A Dtegra30-asus-lvds-display.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 /* This dtsi file describes parts common for Asus T30 devices with a LVDS panel. */
5 #include <dt-bindings/gpio/tegra-gpio.h>
15 remote-endpoint = <&bridge_input>;
16 bus-width = <24>;
23 display-panel {
24 power-supply = <&vdd_pnl>;
25 ddc-i2c-bus = <&lcd_ddc>;
30 remote-endpoint = <&bridge_output>;
35 /* Texas Instruments SN75LVDS83B LVDS Transmitter */
[all …]
H A Dtegra20-asus-tf101.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/atmel-maxtouch.h>
5 #include <dt-bindings/input/gpio-keys.h>
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/thermal/thermal.h>
10 #include "tegra20-cpu-opp.dtsi"
11 #include "tegra20-cpu-opp-microvolt.dtsi"
16 chassis-type = "convertible";
33 * pre-existing /chosen node to be available to insert the
[all …]
/freebsd-src/sys/contrib/device-tree/Bindings/display/rockchip/
H A Drockchip-lvds.txt1 Rockchip RK3288 LVDS interface
5 - compatible: matching the soc type, one of
6 - "rockchip,rk3288-lvds";
7 - "rockchip,px30-lvds";
9 - reg: physical base address of the controller and length
11 - clocks: must include clock specifiers corresponding to entries in the
12 clock-names property.
13 - clock-names: must contain "pclk_lvds"
15 - avdd1v0-supply: regulator phandle for 1.0V analog power
16 - avdd1v8-supply: regulator phandle for 1.8V analog power
[all …]
H A Drockchip,lvds.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/rockchip/rockchip,lvds.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip low-voltage differential signal (LVDS) transmitter
10 - Sandy Huang <hjc@rock-chips.com>
11 - Heiko Stuebner <heiko@sntech.de>
16 - rockchip,px30-lvds
17 - rockchip,rk3288-lvds
25 clock-names:
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/freebsd-src/sys/contrib/device-tree/Bindings/display/imx/
H A Dldb.txt1 Device-Tree bindings for LVDS Display Bridge (ldb)
3 LVDS Display Bridge
6 The LVDS Display Bridge device tree node contains up to two lvds-channel
7 nodes describing each of the two LVDS encoder channels of the bridge.
10 - #address-cells : should be <1>
11 - #size-cells : should be <0>
12 - compatible : should be "fsl,imx53-ldb" or "fsl,imx6q-ldb".
15 interfaces as input for each LVDS channel.
16 - gpr : should be <&gpr> on i.MX53 and i.MX6q.
17 The phandle points to the iomuxc-gpr region containing the LVDS
[all …]
/freebsd-src/sys/contrib/device-tree/Bindings/display/
H A Damlogic,meson-vpu.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/display/amlogic,meson-vpu.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Neil Armstrong <neil.armstrong@linaro.org>
17 DMC|---------------VPU (Video Processing Unit)----------------|------HHI------|
19 D |-------| |----| | | | | HDMI PLL |
20 D | vd2 | VIU | | Video Post | | Video Encoders |<---|-----VCLK |
21 R |-------| |----| Processing | | | | |
22 | osd2 | | | |---| Enci ----------|----|-----VDAC------|
[all …]
H A Dallwinner,sun4i-a10-tcon.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-tcon.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
14 The TCON acts as a timing controller for RGB, LVDS and TV
18 "#clock-cells":
23 - const: allwinner,sun4i-a10-tcon
24 - const: allwinner,sun5i-a13-tcon
[all …]
/freebsd-src/sys/contrib/device-tree/src/arm/microchip/
H A Dat91-nattis-2-natte-2.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * at91-nattis-2-natte-2.dts - Device Tree file for the Linea/Nattis board
9 /dts-v1/;
10 #include "at91-linea.dtsi"
11 #include "at91-natte.dtsi"
14 model = "Axentia Linea-Nattis v2 Natte v2";
15 compatible = "axentia,nattis-2", "axentia,natte-2", "axentia,linea",
18 gpio-keys {
19 compatible = "gpio-keys";
21 key-wakeup {
[all …]
/freebsd-src/sys/contrib/device-tree/Bindings/display/mediatek/
H A Dmediatek,dpi.txt5 provides 8-bit RGB/YUV444 or 8/10/10-bit YUV422 pixel data on a parallel
9 - compatible: "mediatek,<chip>-dpi"
11 - reg: Physical base address and length of the controller's registers
12 - interrupts: The interrupt signal from the function block.
13 - clocks: device clocks
14 See Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
15 - clock-names: must contain "pixel", "engine", and "pll"
16 - port: Output port node with endpoint definitions as described in
18 to the input port of an attached HDMI or LVDS encoder chip.
21 - pinctrl-names: Contain "default" and "sleep".
[all …]
H A Dmediatek,dpi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schema
[all...]
/freebsd-src/sys/contrib/device-tree/src/arm/rockchip/
H A Drk3188-bqedison2qc.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/i2c/i2c.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
14 model = "BQ Edison2 Quad-Core";
15 compatible = "mundoreader,bq-edison2qc", "rockchip,rk3188";
29 compatible = "pwm-backlight";
30 power-supply = <&vsys>;
34 gpio-keys {
[all …]
/freebsd-src/sys/contrib/device-tree/src/arm/nxp/ls/
H A Dls1021a-tqmls1021a-mbls1021a.dts1 // SPDX-License-Identifier: (GPL-2.0-or-later OR X11)
3 * Copyright 2013-2014 Freescale Semiconductor, Inc.
4 * Copyright 2018-2023 TQ-Systems GmbH <linux@ew.tq-group.com>,
5 * D-82229 Seefeld, Germany.
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/linux-event-codes.h>
13 #include <dt-bindings/leds/common.h>
14 #include <dt-bindings/leds/leds-pca9532.h>
15 #include <dt-bindings/net/ti-dp83867.h>
[all …]
/freebsd-src/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx6dl-b1x5pv2.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
6 // Copyright 2018-2021 General Electric Company
7 // Copyright 2018-2021 Collabora
9 #include <dt-bindings/input/input.h>
10 #include "imx6dl-qmx6.dtsi"
14 stdout-path = &uart3;
20 operating-points = <
25 fsl,soc-operating-points = <
26 /* ARM kHz SOC-PU uV */
33 operating-points = <
[all …]
/freebsd-src/sys/arm/nvidia/drm2/
H A Dtegra_drm.h1 /*-
2 * Copyright 1992-2015 Michal Meloun
56 bool flip_x; /* Inverted X-axis */
57 bool flip_y; /* Inverted Y-axis */
71 void *panel; /* XXX For LVDS panel */
77 struct drm_encoder encoder; member
/freebsd-src/sys/contrib/device-tree/src/arm/renesas/
H A Dr8a7779-marzen.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car H1 (R8A77790) Marzen board
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
26 stdout-path = "serial0:115200n8";
34 fixedregulator3v3: regulator-3v3 {
35 compatible = "regulator-fixed";
36 regulator-name = "fixed-3.3V";
[all …]
/freebsd-src/sys/dev/drm2/
H A Ddrm_crtc.h3 * Copyright © 2007-2008 Dave Airlie
4 * Copyright © 2007-2008 Intel Corporation
62 * control chips as 'CRTCs'. They can control any type of connector, VGA, LVDS,
104 MODE_UNVERIFIED = -3, /* mode needs to reverified */
105 MODE_BAD = -2, /* unspecified reason */
106 MODE_ERROR = -1 /* error condition */
300 * drm_crtc_funcs - control CRTCs for a given device
314 * CRTC is simply historical, a CRTC may control LVDS, VGA, DVI, TV out, etc.
360 * drm_crtc - central CRTC control structure
378 * @helper_private: mid-layer private data
[all …]
H A Ddrm_crtc_helper.c2 * Copyright (c) 2006-2008 Intel Corporation
41 * drm_helper_move_panel_connectors_to_head() - move panels to the front in the
48 * (eDP/LVDS) panels to the front of the connector list, instead of
59 &dev->mode_config.connector_list, head) { in drm_helper_move_panel_connectors_to_head()
60 if (connector->connector_type == DRM_MODE_CONNECTOR_LVDS || in drm_helper_move_panel_connectors_to_head()
61 connector->connector_type == DRM_MODE_CONNECTOR_eDP) in drm_helper_move_panel_connectors_to_head()
62 list_move_tail(&connector->head, &panel_list); in drm_helper_move_panel_connectors_to_head()
65 list_splice(&panel_list, &dev->mode_config.connector_list); in drm_helper_move_panel_connectors_to_head()
80 list_for_each_entry(mode, &connector->modes, head) { in drm_mode_validate_flag()
81 if ((mode->flags & DRM_MODE_FLAG_INTERLACE) && in drm_mode_validate_flag()
[all …]
H A Ddrm_crtc.c2 * Copyright (c) 2006-2008 Intel Corporation
84 * Non-global properties, but "required" for certain connectors.
88 { DRM_MODE_SUBCONNECTOR_Automatic, "Automatic" }, /* DVI-I and TV-out */
89 { DRM_MODE_SUBCONNECTOR_DVID, "DVI-D" }, /* DVI-I */
90 { DRM_MODE_SUBCONNECTOR_DVIA, "DVI-A" }, /* DVI-I */
97 { DRM_MODE_SUBCONNECTOR_Unknown, "Unknown" }, /* DVI-I and TV-ou
174 drm_get_encoder_name(struct drm_encoder * encoder) drm_get_encoder_name() argument
609 drm_encoder_init(struct drm_device * dev,struct drm_encoder * encoder,const struct drm_encoder_funcs * funcs,int encoder_type) drm_encoder_init() argument
635 drm_encoder_cleanup(struct drm_encoder * encoder) drm_encoder_cleanup() argument
1031 struct drm_encoder *encoder; drm_mode_group_init_legacy_group() local
1069 struct drm_encoder *encoder, *enct; drm_mode_config_cleanup() local
1217 struct drm_encoder *encoder; drm_mode_getresources() local
1588 struct drm_encoder *encoder; drm_mode_getencoder() local
3400 drm_mode_connector_attach_encoder(struct drm_connector * connector,struct drm_encoder * encoder) drm_mode_connector_attach_encoder() argument
3415 drm_mode_connector_detach_encoder(struct drm_connector * connector,struct drm_encoder * encoder) drm_mode_connector_detach_encoder() argument
3668 struct drm_encoder *encoder; drm_mode_config_reset() local
[all...]
H A Ddrm_fb_helper.c2 * Copyright (c) 2006-2009 Red Hat Inc.
3 * Copyright (c) 2006-2008 Intel Corporation
62 fb_helper = sc->fb_helper; in vt_restore_fbdev_mode()
63 sx_xlock(&fb_helper->dev->mode_config.mutex); in vt_restore_fbdev_mode()
65 sx_xunlock(&fb_helper->dev->mode_config.mutex); in vt_restore_fbdev_mode()
76 taskqueue_enqueue(taskqueue_thread, &sc->fb_mode_task); in vt_kms_postswitch()
78 drm_fb_helper_restore_fbdev_mode(sc->fb_helper); in vt_kms_postswitch()
92 TASK_INIT(&sc->fb_mode_task, 0, vt_restore_fbdev_mode, sc); in framebuffer_alloc()
94 info->fb_priv = sc; in framebuffer_alloc()
95 info->enter = &vt_kms_postswitch; in framebuffer_alloc()
[all …]
/freebsd-src/sys/contrib/device-tree/Bindings/display/tegra/
H A Dnvidia,tegra124-sor.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra124-sor.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra SOR Output Encoder
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
14 The Serial Output Resource (SOR) can be used to drive HDMI, LVDS, eDP
19 pattern: "^sor@[0-9a-f]+$"
23 - enum:
[all …]
/freebsd-src/sys/contrib/device-tree/src/arm64/renesas/
H A Ddraak.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2018 Renesas Electronics Corp.
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
21 audio_clkout: audio-clkout {
24 * but needed to avoid cs2000/rcar_sound probe dead-lock
26 compatible = "fixed-clock";
27 #clock-cells = <0>;
28 clock-frequency = <12288000>;
32 compatible = "pwm-backlight";
[all …]
H A Debisu.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the Ebisu/Ebisu-4D board
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
33 stdout-path = "serial0:115200n8";
36 audio_clkout: audio-clkout {
39 * but needed to avoid cs2000/rcar_sound probe dead-lock
41 compatible = "fixed-clock";
42 #clock-cells = <0>;
43 clock-frequency = <11289600>;
[all …]

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