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/llvm-project/mlir/include/mlir/Dialect/Vector/TransformOps/
H A DVectorTransformOps.td112 Indicates that vector bitcast operations should be lowered to
126 Indicates that vector broadcast operations should be lowered to
140 Indicates that vector contraction-like operations should be lowered to
159 Indicates that vector create_mask-like operations should be lowered to
171 should be lowered to finer-grained vector primitives.
201 Indicates that mask operations should be lowered to fine-grained arithemtic
215 Indicates that vector multi_reduction-like operations should be lowered to
235 Indicates that the vector outerproduct operations should be lowered to
249 Indicates that vector.gather operations should be lowered to
260 Indicates that vector.scan operations should be lowered t
[all...]
/llvm-project/llvm/test/CodeGen/PowerPC/
H A Dfmf-propagation.ll19 ; FMFDEBUG-LABEL: Optimized lowered selection DAG: %bb.0 'fmul_fadd_contract1:'
42 ; FMFDEBUG-LABEL: Optimized lowered selection DAG: %bb.0 'fmul_fadd_contract2:'
63 ; FMFDEBUG-LABEL: Optimized lowered selection DAG: %bb.0 'fmul_fadd_contract3:'
86 ; FMFDEBUG-LABEL: Optimized lowered selection DAG: %bb.0 'fmul_fadd_reassoc1:'
108 ; FMFDEBUG-LABEL: Optimized lowered selection DAG: %bb.0 'fmul_fadd_reassoc2:'
131 ; FMFDEBUG-LABEL: Optimized lowered selection DAG: %bb.0 'fmul_fadd_fast1:'
154 ; FMFDEBUG-LABEL: Optimized lowered selection DAG: %bb.0 'fmul_fadd_fast2:'
178 ; FMFDEBUG-LABEL: Optimized lowered selection DAG: %bb.0 'fmul_fma_reassoc1:'
182 ; GLOBALDEBUG-LABEL: Optimized lowered selection DAG: %bb.0 'fmul_fma_reassoc1:'
207 ; FMFDEBUG-LABEL: Optimized lowered selection DAG: %bb.0 'fmul_fma_reassoc2:'
[all …]
H A Dadd_cmp.ll12 ; CHECK: Optimized lowered selection DAG: %bb.0 'addiCmpiUnsigned:entry'
25 ; CHECK: Optimized lowered selection DAG: %bb.0 'addiCmpiSigned:entry'
38 ; CHECK: Optimized lowered selection DAG: %bb.0 'addiCmpiUnsignedOverflow:entry'
51 ; CHECK: Optimized lowered selection DAG: %bb.0 'addiCmpiSignedOverflow:entry'
/llvm-project/llvm/test/CodeGen/AMDGPU/
H A Dlds-mixed-absolute-addresses-unused.ll5 ; This looks like a partially lowered module, but the non-lowered GV isn't used by any kernels.
9 @lowered = addrspace(3) global i32 poison, !absolute_symbol !0
17 ; CHECK-NEXT: store i32 [[VAL1]], ptr addrspace(3) @lowered, align 4
21 store i32 %val1, ptr addrspace(3) @lowered
H A Dendcf-loop-header.ll4 ; loop block. This intrinsic will be lowered to s_or_b64 by the code
9 ; This is was lowered from the llvm.SI.end.cf intrinsic:
/llvm-project/llvm/test/Transforms/LowerMatrixIntrinsics/
H A Dremarks-inlining.ll50 ; CHECK-LABEL: remark: load.h:41:43: Lowered with 0 stores, 10 loads, 0 compute ops, 0 exposed tran…
53 ; CHECK-LABEL: remark: load.h:41:43: Lowered with 0 stores, 10 loads, 0 compute ops, 0 exposed tran…
56 ; CHECK-LABEL: remark: load.h:41:11: Lowered with 0 stores, 1 loads, 0 compute ops, 0 exposed trans…
59 ; CHECK-LABEL: remark: assign.h:32:43: Lowered with 0 stores, 10 loads, 0 compute ops, 0 exposed tr…
62 ; CHECK-LABEL: remark: assign.h:32:43: Lowered with 0 stores, 10 loads, 0 compute ops, 0 exposed tr…
65 ; CHECK-LABEL: remark: toplevel.c:410:0: Lowered with 10 stores, 20 loads, 10 compute ops, 0 expose…
72 ; CHECK-LABEL: remark: toplevel.c:510:0: Lowered with 2 stores, 1 loads, 4 compute ops, 1 exposed t…
77 ; CHECK-LABEL: remark: add.h:66:11: Lowered with 0 stores, 0 loads, 10 compute ops, 0 exposed trans…
82 ; CHECK-LABEL: remark: store.h:10:11: Lowered with 10 stores, 0 loads, 0 compute ops, 0 exposed tra…
87 ; CHECK-LABEL: remark: store.h:66:11: Lowered with 2 stores, 0 loads, 0 compute ops, 0 exposed tran…
[all …]
H A Dremarks.ll7 ; CHECK-LABEL: remark: test.h:40:20: Lowered with 6 stores, 6 loads, 24 compute ops
18 ; CHECK-LABEL: remark: test.h:50:20: Lowered with 2 stores, 12 loads, 22 compute ops
32 ; CHECK-LABEL: remark: test.h:60:20: Lowered with 6 stores, 6 loads, 0 compute ops
42 ; CHECK-LABEL: remark: test.h:70:20: Lowered with 6 stores, 6 loads, 0 compute ops
53 ; CHECK-LABEL: remark: test.h:80:20: Lowered with 6 stores, 6 loads, 12 compute ops
71 ; CHECK-LABEL: remark: test.h:90:20: Lowered with 6 stores, 6 loads, 12 compute ops
80 ; CHECK-NEXT: remark: test.h:90:20: Lowered with 2 stores, 12 loads, 22 compute ops
101 ; CHECK-LABEL: remark: test.h:100:20: Lowered with 6 stores, 6 loads, 12 compute ops
118 ; CHECK-LABEL: remark: test.h:30:20: Lowered with 10 stores, 9 loads, 30 compute ops
H A Dremarks-shared-subtrees.ll10 ; YAML-NEXT: Name: matrix-lowered
14 ; YAML-NEXT: - String: 'Lowered with '
40 ; YAML-NEXT: Name: matrix-lowered
44 ; YAML-NEXT: - String: 'Lowered with '
73 ; STDERR-LABEL: remark: test.cpp:35:71: Lowered with 4 stores, 0 loads, 0 compute ops,
81 ; STDERR-LABEL: remark: test.cpp:35:45: Lowered with 30 stores, 45 loads, 120 compute ops,
/llvm-project/llvm/lib/Target/Mips/
H A DMipsCCState.h45 /// Identify lowered values that originated from f128 arguments and record
50 /// Identify lowered values that originated from f128 arguments and record
54 /// Identify lowered values that originated from f128 arguments and record
61 /// Identify lowered values that originated from f128 arguments and record
76 /// Records whether the value has been lowered from an f128.
79 /// Records whether the value has been lowered from float.
82 /// Records whether the value has been lowered from a floating point vector.
85 /// Records whether the return value has been lowered from a floating point
H A DMipsCCState.cpp96 /// Identify lowered values that originated from f128 or float arguments and
117 /// Identify lowered values that originated from vXfXX arguments and record
140 /// Identify lowered values that originated from f128, float and sret to vXfXX
177 /// Identify lowered values that originated from f128, float and vXfXX arguments
/llvm-project/llvm/lib/Target/SPIRV/
H A DSPIRVBuiltins.h31 /// \p DemangledCall is the skeleton of the lowered builtin function call.
36 /// \p Args are the arguments of the lowered builtin call.
56 /// \p DemangledCall is the skeleton of the lowered builtin function call.
65 /// TargetExtType that can be further lowered with lowerBuiltinType().
81 /// \p Type is the special opaque/builtin type to be lowered.
/llvm-project/llvm/test/CodeGen/AArch64/
H A Dvector-insert-dag-combines.ll19 ; CHECK: Optimized lowered selection DAG: %bb.0 'insert_small_fixed_into_big_fixed:'
42 ; CHECK: Optimized lowered selection DAG: %bb.0 'insert_small_fixed_into_big_scalable:'
66 ; CHECK: Optimized lowered selection DAG: %bb.0 'insert_small_scalable_into_big_fixed:'
93 ; CHECK: Optimized lowered selection DAG: %bb.0 'insert_small_scalable_into_big_scalable_1:'
118 ; CHECK: Optimized lowered selection DAG: %bb.0 'insert_small_scalable_into_big_scalable_2:'
142 ; CHECK: Optimized lowered selection DAG: %bb.0 'extract_small_fixed_from_big_fixed:'
166 ; CHECK: Optimized lowered selection DAG: %bb.0 'extract_small_scalable_from_big_fixed:'
192 ; CHECK: Optimized lowered selection DAG: %bb.0 'extract_small_fixed_from_big_scalable:'
216 ; CHECK: Optimized lowered selection DAG: %bb.0 'extract_small_scalable_from_big_scalable_1:'
241 ; CHECK: Optimized lowered selection DAG: %bb.0 'extract_small_scalable_from_big_scalable_2:'
[all …]
/llvm-project/clang/test/CodeGen/
H A Dpreserve-call-conv.c9 // is lowered to the corresponding calling convention attrribute at the LLVM IR
16 // is lowered to the corresponding calling convention attrribute at the LLVM IR
23 // is lowered to the corresponding calling convention attrribute at the LLVM IR
/llvm-project/flang/include/flang/Lower/
H A DConvertConstant.h34 /// type, and array constants will be lowered into read only memory
37 /// lowered while the builder is already in a fir.global body because
70 /// Lower a StructureConstructor that must be lowered in read only data although
73 /// Fortran constant expression but can and must still be lowered into read only
H A DVectorSubscripts.h10 /// \brief Defines a compiler internal representation for lowered designators
41 /// VectorSubscriptBox is a lowered representation for any Designator<T> that
45 /// Is lowered into:
128 /// Lowered base of the ranked array ref.
H A DConvertCall.h27 /// Data structure packaging the SSA value(s) produced for the result of lowered
32 /// Given a call site for which the arguments were already lowered, generate
52 /// Is \p procRef an intrinsic module procedure that should be lowered as
57 /// lowered result value. Return nothing otherwise.
/llvm-project/llvm/test/CodeGen/X86/
H A Dswitch-density.ll44 ; Lowered as a jump table when sparse, and branches when dense.
75 ; Lowered as a jump table when sparse, and branches when dense.
98 ; Lowered as branches.
124 ; Lowered as branches.
/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyUtilities.h53 /// Returns the __funcref_call_table, for use in funcref calls when lowered to
66 /// Returns true if multivalue returns of a function can be lowered directly,
71 /// Returns true if the function's return value(s) can be lowered directly,
/llvm-project/flang/docs/
H A DOpenMP-declare-target.md163 sure that most incompatible code for the host is not lowered for the
181 operation has been lowered to LLVM-IR. As it is applicable to
216 operations that use them directly) which still refer to the original lowered
218 as the final function and alteration to the lowered `target` region, it's only
220 "ref" pointer , and it effectively replaces all uses of the originally lowered
H A DPolymorphicEntities.md7 entities in FIR and how polymorphic related constructs and features are lowered
156 The construct is lowered to a specific FIR operation `fir.select_type`. It is
190 `TYPE IS` type guard statement is lowered to an inlined comparison. The
191 `CLASS IS` type guard statement is lowered to a runtime function call.
424 not passed as argument when lowered. If `PASS(arg-name)` is specified, the
460 The `fir.dispatch` is lowered to FIR operations by the `PolymorphicOpConversion`
618 Appropriate call to finalization have to be lowered at the right places (7.5.6.3
709 The `ALLOCATE` statement is lowered to runtime calls as shown in the example
735 The `DEALLOCATE` statement is lowered to a runtime call to
756 Both intrinsic functions are lowered t
[all...]
/llvm-project/llvm/test/CodeGen/SystemZ/
H A Dcombine_loads_from_build_pair.ll6 ; between "Initial selection DAG" and "Optimized lowered selection DAG".
18 ; CHECK-LABEL: Optimized lowered selection DAG:
/llvm-project/flang/test/Lower/
H A Dlogical-as-fortran.f901 ! Test that logicals are lowered to Fortran logical types where it matters
4 ! Logicals should be lowered to Fortran logical types in memory/function
/llvm-project/mlir/lib/Conversion/GPUToNVVM/
H A DWmmaOpsToNvvm.cpp25 /// Checks if all the operands of the op being lowered are of LLVM Types. The
27 /// is actually lowered. If the type of an operands is not already converted it
89 // choose which intrinsic this op will be lowered to. in matchAndRewrite()
158 // choose which intrinsic this op will be lowered to. in matchAndRewrite()
212 // values form lowered memrefs. in matchAndRewrite()
224 // choose which intrinsic this op will be lowered to. in matchAndRewrite()
/llvm-project/mlir/docs/Dialects/
H A DShapeDialect.md25 This final lowered form is imperative form with side-effecting ops (e.g.,
116 // Here the lowered
165 The above form can now be lowered to the fully imperative form (see
198 The above could be further lowered by using `tensor.dim`, `tensor.from_elements`
/llvm-project/libcxx/test/std/atomics/atomics.general/
H A Dreplace_failure_order.pass.cpp18 // have visibility to see what these memory orders are lowered to, but we can at
19 // least check that they are lowered at all (otherwise there is a compile

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