| /freebsd-src/sbin/conscontrol/ |
| H A D | conscontrol.8 | 1 .\"-
2 .\" SPDX-License-Identifer: BSD-2-Clause
56 There are two types of logical consoles; a high level console which
59 and a low level console.
60 The low level console is used for kernel
65 while the high level console is used by user programs like
67 Multiple device support is implemented only for the low level console;
68 the high level console is set to the first device in the console list.
77 .Bl -tag -width indent
80 The device must support low-level console operations.
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| /freebsd-src/share/man/man9/ |
| H A D | osd.9 | 110 run-time with any kernel data structure which has been suitably modified for use
113 The one-off modification required involves embedding a
136 and provide a high-level grouping for slots to be registered under.
148 The function may sleep and therefore cannot be called from a non-sleepable
152 argument specifies which high-level type grouping from
176 The function may sleep and therefore cannot be called from a non-sleepabl
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| /freebsd-src/sys/contrib/device-tree/Bindings/interrupt-controller/ |
| H A D | snps,archs-idu-intc.txt | 1 * ARC-HS Interrupt Distribution Unit
3 This optional 2nd level interrupt controller can be used in SMP configurations
9 - compatible: "snps,archs-idu-intc"
10 - interrupt-controller: This is an interrupt controller.
11 - #interrupt-cells: Must be <1> or <2>.
18 - bits[3:0] trigger type and level flags
19 1 = low-to-high edge triggered
20 2 = NOT SUPPORTED (high-to-low edge triggered)
21 4 = active high level-sensitive <<< DEFAULT
22 8 = NOT SUPPORTED (active low level-sensitive)
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| H A D | atmel,aic.txt | 4 - compatible: Should be:
5 - "atmel,<chip>-aic" where <chip> can be "at91rm9200", "sama5d2",
7 - "microchip,<chip>-aic" where <chip> can be "sam9x60"
9 - interrupt-controller: Identifies the node as an interrupt controller.
10 - #interrupt-cells: The number of cells to define the interrupts. It should be 3.
13 bits[3:0] trigger type and level flags:
14 1 = low-to-high edge triggered.
15 2 = high-to-low edge triggered.
16 4 = active high level-sensitive.
17 8 = active low level-sensitive.
[all …]
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| H A D | img,pdc-intc.txt | 10 - compatible: Specifies the compatibility list for the interrupt controller.
11 The type shall be <string> and the value shall include "img,pdc-intc".
13 - reg: Specifies the base PDC physical address(s) and size(s) of the
14 addressable register space. The type shall be <prop-encoded-array>.
16 - interrupt-controller: The presence of this property identifies the node
19 - #interrupt-cells: Specifies the number of cells needed to encode an
22 - num-perips: Number of waking peripherals.
24 - num-syswakes: Number of SysWake inputs.
26 - interrupts: List of interrupt specifiers. The first specifier shall be the
34 - <1st-cell>: The interrupt-number that identifies the interrupt source.
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| H A D | open-pic.txt | 13 - compatible: Specifies the compatibility list for the PIC. The type
14 shall be <string> and the value shall include "open-pic".
16 - reg: Specifies the base physical address(s) and size(s) of this
17 PIC's addressable register space. The type shall be <prop-encoded-array>.
19 - interrupt-controller: The presence of this property identifies the node
22 - #interrupt-cells: Specifies the number of cells needed to encode an
25 - #address-cells: Specifies the number of cells needed to encode an
27 'interrupt-map' nodes do not have to specify a parent unit address.
31 - pic-no-reset: The presence of this property indicates that the PIC
42 - <1st-cell>: The interrupt-number that identifies the interrupt source.
[all …]
|
| /freebsd-src/sys/contrib/device-tree/Bindings/watchdog/ |
| H A D | gpio-wdt.txt | 1 * GPIO-controlled Watchdog
4 - compatible: Should contain "linux,wdt-gpio".
5 - gpios: From common gpio binding; gpio connection to WDT reset pin.
6 - hw_algo: The algorithm used by the driver. Should be one of the
8 - toggle: Either a high-to-low or a low-to-high transition clears
10 left floating or connected to a three-state buffer.
11 - level: Low or high level starts counting WDT timeout,
12 the opposite level disables the WDT. Active level is determined
14 - hw_margin_ms: Maximum time to reset watchdog circuit (milliseconds).
17 - always-running: If the watchdog timer cannot be disabled, add this flag to
[all …]
|
| H A D | gpio-wdt.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/watchdog/gpio-wdt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Robert Marko <robert.marko@sartura.hr>
14 const: linux,wdt-gpio
24 - description:
25 Either a high-to-low or a low-to-high transition clears the WDT counter.
27 to a three-state buffer.
29 - description:
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|
| H A D | linux,wdt-gpio.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/watchdog/linux,wdt-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: GPIO-controlled Watchdog
10 - Guenter Roeck <linux@roeck-us.net>
11 - Robert Marko <robert.marko@sartura.hr>
15 const: linux,wdt-gpio
24 - description:
25 Either a high-to-low or a low-to-high transition clears the WDT counter.
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|
| /freebsd-src/share/man/man4/ |
| H A D | mac_biba.4 | 1 .\" Copyright (c) 2002-2004 Networks Associates Technology, Inc.
7 .\" DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the
40 .Bd -ragged -offset indent
47 .Bd -ragged -offset indent
53 .Bd -literal -offset indent
63 up of hierarchal grades, and non-hierarchal components.
69 The non-hierarchal compartment field is expressed as a set of up to 256
71 A complete label consists of both hierarchal and non-hierarchal elements.
74 .Bl -column -offset indent ".Li biba/equal" "lower than all other labels"
78 .It Li biba/high Ta "higher than all other labels"
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|
| H A D | mac_mls.4 | 1 .\" Copyright (c) 2002-2004 Networks Associates Technology, Inc.
7 .\" DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the
36 .Nd "Multi-Level Security confidentiality policy"
40 .Bd -ragged -offset indent
47 .Bd -ragged -offset indent
53 .Bd -literal -offset indent
59 policy module implements the Multi-Level Security, or MLS model,
63 each subject's MLS label contains information on its clearance level,
67 made up of a sensitivity level and zero or more compartments.
71 The sensitivity level is expressed as a value between 0 and
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| /freebsd-src/sys/contrib/device-tree/src/arm64/freescale/ |
| H A D | fsl-ls208xa.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Freescale Layerscape-2080A family SoC.
6 * Copyright 2017-2020 NXP
12 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
13 #include <dt-bindings/thermal/thermal.h>
14 #include <dt-bindings/interrupt-controlle
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| /freebsd-src/crypto/openssl/doc/man7/ |
| H A D | evp.pod | 5 evp - high-level cryptographic functions
13 The EVP library provides a high-level interface to cryptographic
28 The B<EVP_PKEY>I<XXX> functions provide a high-level interface to
76 Although low-level algorithm specific functions exist for many algorithms
78 versions of new algorithms cannot be accessed using the low-level functions.
80 cleanly supported at the low-level and some operations are more efficient
81 using the high-level interface.
109 Copyright 2000-2021 The OpenSSL Project Authors. All Rights Reserved.
|
| /freebsd-src/contrib/llvm-project/clang/include/clang/Basic/ |
| H A D | LangStandards.def | 1 //===-- LangStandards.def - Language Standard Data -------
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| /freebsd-src/sys/contrib/device-tree/Bindings/gpio/ |
| H A D | gpio-nmk.txt | 4 - compatible : Should be "st,nomadik-gpio".
5 - reg : Physical base address and length of the controller's registers.
6 - interrupts : The interrupt outputs from the controller.
7 - #gpio-cells : Should be two:
10 - bits[3:0] trigger type and level flags:
11 1 = low-to-high edge triggered.
12 2 = high-to-low edge triggered.
13 4 = active high level-sensitive.
14 8 = active low level-sensitive.
15 - gpio-controller : Marks the device node as a GPIO controller.
[all …]
|
| H A D | gpio-vf610.txt | 8 - compatible : Should be "fsl,<soc>-gpio", below is supported list:
9 "fsl,vf610-gpio"
10 "fsl,imx7ulp-gpio"
11 - reg : The first reg tuple represents the PORT module, the second tuple
13 - interrupts : Should be the port interrupt shared by all 32 pins.
14 - gpio-controller : Marks the device node as a gpio controller.
15 - #gpio-cells : Should be two. The first cell is the pin number and
17 0 = active high
19 - interrupt-controller: Marks the device node as an interrupt controller.
20 - #interrupt-cells : Should be 2. The first cell is the GPIO number.
[all …]
|
| H A D | nvidia,tegra20-gpio.txt | 4 - compatible : "nvidia,tegra<chip>-gpio"
5 - reg : Physical base address and length of the controller's registers.
6 - interrupts : The interrupt outputs from the controller. For Tegra20,
9 - #gpio-cells : Should be two. The first cell is the pin number and the
11 - bit 0 specifies polarity (0 for normal, 1 for inverted)
12 - gpio-controller : Marks the device node as a GPIO controller.
13 - #interrupt-cells : Should be 2.
16 bits[3:0] trigger type and level flags:
17 1 = low-to-high edge triggered.
18 2 = high-to-low edge triggered.
[all …]
|
| H A D | gpio-zynq.txt | 2 -------------------------------------------
5 - #gpio-cells : Should be two
6 - First cell is the GPIO line number
7 - Second cell is used to specify optional
9 - compatible : Should be "xlnx,zynq-gpio-1.0" or
10 "xlnx,zynqmp-gpio-1.0" or "xlnx,versal-gpio-1.0
11 or "xlnx,pmc-gpio-1.0
12 - clocks : Clock specifier (see clock bindings for details)
13 - gpio-controller : Marks the device node as a GPIO controller.
14 - interrupts : Interrupt specifier (see interrupt bindings for
[all …]
|
| H A D | gpio-omap.txt | 4 - compatible:
5 - "ti,omap2-gpio" for OMAP2 controllers
6 - "ti,omap3-gpio" for OMAP3 controllers
7 - "ti,omap4-gpio" for OMAP4 controllers
8 - reg : Physical base address of the controller and length of memory mapped
10 - gpio-controller : Marks the device node as a GPIO controller.
11 - #gpio-cells : Should be two.
12 - first cell is the pin number
13 - second cell is used to specify optional parameters (unused)
14 - interrupt-controller: Mark the device node as an interrupt controller.
[all …]
|
| H A D | nvidia,tegra20-gpio.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/nvidia,tegra20-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra GPIO Controller (Tegra20 - Tegra210)
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
16 - enum:
17 - nvidia,tegra20-gpio
18 - nvidia,tegra30-gpio
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|
| H A D | brcm,brcmstb-gpio.txt | 3 The controller's registers are organized as sets of eight 32-bit
9 - compatible:
10 Must be "brcm,brcmstb-gpio"
12 - reg:
16 - #gpio-cells:
19 bit[0]: polarity (0 for active-high, 1 for active-low)
21 - gpio-controller:
24 - brcm,gpio-bank-widths:
30 - interrupts:
33 - interrupts-extended:
[all …]
|
| H A D | brcm,brcmstb-gpio.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/brcm,brcmstb-gpi
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| /freebsd-src/sys/dev/ath/ath_hal/ar5416/ |
| H A D | ar5416_ani.c | 1 /*-
2 * SPDX-License-Identifier: ISC
4 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
5 * Copyright (c) 2002-2008 Atheros Communications, Inc.
39 ((((x)%(mul)) >= ((mul)/2)) ? ((x) + ((mul) - 1)) / (mul) : (x)/(mul))
41 HAL_EP_RND(ahp->ah_stats.ast_nodestats.ns_avgbrssi, \
55 * ANI_ENA_RSSI indicates whether rssi-based processing should
64 (AH5212(ah)->ah_procPhyErr & HAL_ANI_ENA)
66 (AH5212(ah)->ah_procPhyErr & HAL_RSSI_ANI_ENA)
77 __func__, params->ofdmPhyErrBase, params->cckPhyErrBase); in enableAniMIBCounters()
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| /freebsd-src/sys/contrib/device-tree/Bindings/regulator/ |
| H A D | richtek,rtmv20-regulator.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/regulator/richtek,rtmv20-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - ChiYuan Huang <cy_huang@richtek.com>
27 wakeup-source: true
32 enable-gpios:
36 richtek,ld-pulse-delay-us:
38 load current pulse delay in microsecond after strobe pin pulse high.
43 richtek,ld-pulse-width-us:
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| /freebsd-src/sys/contrib/device-tree/Bindings/phy/ |
| H A D | realtek,usb2phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Stanley Chang <stanley_chang@realtek.com>
23 XHCI controller#0 -- usb2phy -- phy#0
24 |- usb3phy -- phy#0
25 XHCI controller#1 -- usb2phy -- phy#0
26 XHCI controller#2 -- usb2phy -- phy#0
27 |- usb3phy -- phy#0
33 XHCI controller#0 -- usb2phy -- phy#0
[all …]
|