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/freebsd-src/sys/contrib/device-tree/Bindings/net/
H A Dintel,ixp4xx-ethernet.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/net/intel,ixp4xx-ethernet.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Intel IXP4xx ethernet
11 - $ref: ethernet-controller.yaml#
14 - Linus Walleij <linus.walleij@linaro.org>
17 The Intel IXP4xx ethernet makes use of the IXP4xx NPE (Network
18 Processing Engine) and the IXP4xx Queue Manager to process
19 the ethernet frames. It can optionally contain an MDIO bus to
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/freebsd-src/sys/contrib/device-tree/src/arm/intel/ixp/
H A Dintel-ixp45x-ixp46x.dtsi1 // SPDX-License-Identifier: ISC
6 * basic IXP4xx DTSI.
8 #include "intel-ixp4xx.dtsi"
13 compatible = "intel,ixp46x-expansion-bus-controller", "syscon";
19 compatible = "intel,ixp46x-rng";
23 interrupt-controller@c8003000 {
24 compatible = "intel,ixp43x-interrupt";
29 * to present the IXP4xx as a device on a USB bus.
32 compatible = "intel,ixp4xx-udc";
39 compatible = "intel,ixp4xx-i2c";
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H A Dintel-ixp42x-usrobotics-usr8200.dts1 // SPDX-License-Identifier: ISC
4 * VPN and NAS. Based on know-how from Peter Denison.
10 /dts-v1/;
12 #include "intel-ixp42x.dtsi"
13 #include <dt-bindings/input/input.h>
18 #address-cells = <1>;
19 #size-cells = <1>;
28 stdout-path = "uart1:115200n8";
38 compatible = "gpio-leds";
39 ieee1394_led: led-1394 {
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H A Dintel-ixp42x-arcom-vulcan.dts1 // SPDX-License-Identifier: ISC
8 /dts-v1/;
10 #include "intel-ixp42x.dtsi"
11 #include <dt-bindings/input/input.h>
16 #address-cells = <1>;
17 #size-cells = <1>;
27 stdout-path = "uart0:115200n8";
35 compatible = "w1-gpio";
42 compatible = "intel,ixp4xx-flash", "cfi-flash";
43 bank-width = <2>;
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H A Dintel-ixp4xx.dtsi1 // SPDX-License-Identifier: ISC
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/gpio/gpio.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
14 compatible = "simple-bus";
15 interrupt-parent = <&intcon>;
18 * The IXP4xx expansion bus is a set of up to 7 each up to 16MB
22 /* compatible and reg filled in by per-soc device tree */
23 native-endian;
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H A Dintel-ixp42x-gateworks-gw2348.dts1 // SPDX-License-Identifier: ISC
7 /dts-v1/;
9 #include "intel-ixp42x.dtsi"
10 #include <dt-bindings/input/input.h>
15 #address-cells = <1>;
16 #size-cells = <1>;
25 stdout-path = "uart0:115200n8";
33 compatible = "gpio-leds";
34 led-user {
37 default-state = "on";
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H A Dintel-ixp43x-gateworks-gw2358.dts1 // SPDX-License-Identifier: ISC
3 * Device Tree file for Gateworks IXP43x-based Cambria GW2358
6 /dts-v1/;
8 #include "intel-ixp43x.dtsi"
13 #address-cells = <1>;
14 #size-cells = <1>;
24 stdout-path = "uart0:115200n8";
32 compatible = "gpio-leds";
33 led-user {
36 default-state = "on";
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H A Dintel-ixp43x-kixrp435.dts1 // SPDX-License-Identifier: ISC
7 /dts-v1/;
9 #include "intel-ixp43x.dtsi"
10 #include "intel-ixp4xx-reference-design.dtsi"
11 #include <dt-bindings/input/input.h>
16 #address-cells = <1>;
17 #size-cells = <1>;
22 compatible = "intel,ixp4xx-flash", "cfi-flash";
23 bank-width = <2>;
25 intel,ixp4xx-eb-write-enable = <1>;
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H A Dintel-ixp42x-ixdp425.dts1 // SPDX-License-Identifier: ISC
11 /dts-v1/;
13 #include "intel-ixp42x.dtsi"
14 #include "intel-ixp4xx-reference-design.dtsi"
15 #include <dt-bindings/input/input.h>
20 #address-cells = <1>;
21 #size-cells = <1>;
26 compatible = "intel,ixp4xx-flash", "cfi-flash";
27 bank-width = <2>;
29 intel,ixp4xx-eb-write-enable = <1>;
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H A Dintel-ixp46x-ixdp465.dts1 // SPDX-License-Identifier: ISC
7 /dts-v1/;
9 #include "intel-ixp45x-ixp46x.dtsi"
10 #include "intel-ixp4xx-reference-design.dtsi"
11 #include <dt-bindings/input/input.h>
16 #address-cells = <1>;
17 #size-cells = <1>;
22 compatible = "intel,ixp4xx-flash", "cfi-flash";
23 bank-width = <2>;
25 intel,ixp4xx-eb-write-enable = <1>;
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H A Dintel-ixp42x-goramo-multilink.dts1 // SPDX-License-Identifier: ISC
5 * - MultiLink Basic (a box)
6 * - MultiLink Max (19" rack mount)
9 * This is one of the few devices supporting the IXP4xx High-Speed Serial
14 /dts-v1/;
16 #include "intel-ixp42x.dtsi"
17 #include <dt-bindings/input/input.h>
21 compatible = "goramo,multilink-router", "intel,ixp42x";
22 #address-cells = <1>;
23 #size-cells = <1>;
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H A Dintel-ixp42x-adi-coyote.dts1 // SPDX-License-Identifier: ISC
5 * Ethernet set-up from OpenWrt.
8 /dts-v1/;
10 #include "intel-ixp42x.dtsi"
11 #include <dt-bindings/input/input.h>
16 #address-cells = <1>;
17 #size-cells = <1>;
27 stdout-path = "uart1:115200n8";
39 compatible = "intel,ixp4xx-flash", "cfi-flash";
40 bank-width = <2>;
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H A Dintel-ixp42x-gateway-7001.dts1 // SPDX-License-Identifier: ISC
7 /dts-v1/;
9 #include "intel-ixp42x.dtsi"
10 #include <dt-bindings/input/input.h>
15 #address-cells = <1>;
16 #size-cells = <1>;
26 stdout-path = "uart1:115200n8";
37 compatible = "intel,ixp4xx-flash", "cfi-flash";
38 bank-width = <2>;
45 intel,ixp4xx-eb-write-enable = <1>;
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H A Dintel-ixp42x-ixdpg425.dts1 // SPDX-License-Identifier: ISC
5 * Ethernet set-up from OpenWrt.
15 /dts-v1/;
17 #include "intel-ixp42x.dtsi"
18 #include <dt-bindings/input/input.h>
23 #address-cells = <1>;
24 #size-cells = <1>;
34 stdout-path = "uart0:115200n8";
44 compatible = "intel,ixp4xx-flash", "cfi-flash";
45 bank-width = <2>;
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H A Dintel-ixp42x-netgear-wg302v1.dts1 // SPDX-License-Identifier: ISC
7 /dts-v1/;
9 #include "intel-ixp42x.dtsi"
10 #include <dt-bindings/input/input.h>
15 #address-cells = <1>;
16 #size-cells = <1>;
27 stdout-path = "uart1:9600n8";
38 compatible = "intel,ixp4xx-flash", "cfi-flash";
39 bank-width = <2>;
47 intel,ixp4xx-eb-write-enable = <1>;
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H A Dintel-ixp42x-linksys-wrv54g.dts1 // SPDX-License-Identifier: ISC
9 /dts-v1/;
11 #include "intel-ixp42x.dtsi"
12 #include <dt-bindings/input/input.h>
17 #address-cells = <1>;
18 #size-cells = <1>;
28 stdout-path = "uart1:115200n8";
39 compatible = "gpio-leds";
40 led-power {
43 default-state = "on";
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H A Dintel-ixp42x-freecom-fsg-3.dts1 // SPDX-License-Identifier: ISC
3 * Device Tree file for the Freecom FSG-3 router.
8 /dts-v1/;
10 #include "intel-ixp42x.dtsi"
11 #include <dt-bindings/input/input.h>
14 model = "Freecom FSG-3";
15 compatible = "freecom,fsg-3", "intel,ixp42x";
16 #address-cells = <1>;
17 #size-cells = <1>;
28 stdout-path = "uart0:115200n8";
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H A Dintel-ixp42x-linksys-nslu2.dts1 // SPDX-License-Identifier: ISC
6 /dts-v1/;
8 #include "intel-ixp42x.dtsi"
9 #include <dt-bindings/input/input.h>
14 #address-cells = <1>;
15 #size-cells = <1>;
25 stdout-path = "uart0:115200n8";
33 compatible = "gpio-leds";
34 led-statu
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H A Dintel-ixp42x-welltech-epbx100.dts1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
8 #include "intel-ixp42x.dtsi"
13 #address-cells = <1>;
14 #size-cells = <1>;
24 stdout-path = "uart0:115200n8";
34 compatible = "intel,ixp4xx-flash", "cfi-flash";
35 bank-width = <2>;
42 compatible = "fixed-partitions";
43 #address-cells = <1>;
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H A Dintel-ixp42x-iomega-nas100d.dts1 // SPDX-License-Identifier: ISC
6 /dts-v1/;
8 #include "intel-ixp42x.dtsi"
9 #include <dt-bindings/input/input.h>
13 compatible = "iom,nas-100d", "intel,ixp42x";
14 #address-cells = <1>;
15 #size-cells = <1>;
25 stdout-path = "uart0:115200n8";
33 compatible = "gpio-leds";
34 led-wlan {
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/freebsd-src/sys/contrib/device-tree/Bindings/firmware/
H A Dintel,ixp4xx-network-processing-engine.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/firmware/intel,ixp4xx-network-processing-engine.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Intel IXP4xx Network Processing Engine
11 - Linus Walleij <linus.walleij@linaro.org>
14 On the IXP4xx SoCs, the Network Processing Engine (NPE) is a small
16 and crypto tasks. It also manages the MDIO bus to the ethernet PHYs
17 on the IXP4xx platform. All IXP4xx platforms have three NPEs at
24 - items:
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/freebsd-src/share/misc/
H A Dpci_vendors5 # Date: 2024-11-25 03:15:02
8 # the PCI ID Project at https://pci-ids.ucw.cz/.
14 # (version 2 or higher) or the 3-clause BSD License.
25 # device device_name <-- single tab
26 # subvendor subdevice subsystem_name <-- two tabs
30 # This is a relabelled RTL-8139
31 8139 AT-250
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