instructions (full) in projects: freebsd-src

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/freebsd-src/lib/libpmc/pmu-events/arch/x86/tigerlake/
H A D	floating-point.json	14 …instructions retired; some instructions will count twice as noted below. Each count represents 2 … 20 …instructions retired; some instructions will count twice as noted below. Each count represents 2 … 25 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 31 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 36 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 42 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 47 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 53 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 58 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 64 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … [all …]
H A D	cache.json	127 "BriefDescription": "L2 cache hits when fetching instructions, code reads.", 133 "PublicDescription": "Counts L2 cache hits when fetching instructions, code reads.", 138 "BriefDescription": "L2 cache misses when fetching instructions", 144 "PublicDescription": "Counts L2 cache misses when fetching instructions.", 155 …n": "Counts the number of demand Data Read requests initiated by load instructions that hit L2 cac… 199 …ts that hit the L2 cache. Accounts for PREFETCHNTA and PREFETCHT0/1/2 instructions when FB is not … 210 …s that miss the L2 cache. Accounts for PREFETCHNTA and PREFETCHT0/1/2 instructions when FB is not … 248 "BriefDescription": "All retired load instructions.", 256 …PublicDescription": "Counts all retired load instructions. This event accounts for SW prefetch ins… 261 "BriefDescription": "All retired store instructions.", [all …]
/freebsd-src/lib/libpmc/pmu-events/arch/x86/icelakex/
H A D	floating-point.json	15 …instructions retired; some instructions will count twice as noted below. Each count represents 2 … 21 …instructions retired; some instructions will count twice as noted below. Each count represents 2 … 26 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 32 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 37 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 43 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 48 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 54 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 59 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 65 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … [all …]
/freebsd-src/lib/libpmc/pmu-events/arch/x86/icelake/
H A D	floating-point.json	15 …instructions retired; some instructions will count twice as noted below. Each count represents 2 … 21 …instructions retired; some instructions will count twice as noted below. Each count represents 2 … 26 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 32 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 37 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 43 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 48 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 54 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 59 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 65 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … [all …]
/freebsd-src/lib/libpmc/pmu-events/arch/x86/skylakex/
H A D	floating-point.json	3 …ational double precision floating-point instructions retired. Counts twice for DPP and FM(N)ADD/SU… 8 …instructions retired; some instructions will count twice as noted below. Each count represents 2 … 13 …n floating-point instruction retired. Counts twice for DPP and FM(N)ADD/SUB instructions retired.", 18 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 23 … computational precision floating-point instructions retired. Counts twice for DPP and FM(N)ADD/SU… 28 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 33 … computational precision floating-point instructions retired. Counts twice for DPP and FM(N)ADD/SU… 38 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 43 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 48 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … [all …]
/freebsd-src/lib/libpmc/pmu-events/arch/x86/cascadelakex/
H A D	floating-point.json	3 …ational double precision floating-point instructions retired. Counts twice for DPP and FM(N)ADD/SU… 8 …instructions retired; some instructions will count twice as noted below. Each count represents 2 … 13 …n floating-point instruction retired. Counts twice for DPP and FM(N)ADD/SUB instructions retired.", 18 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 23 … computational precision floating-point instructions retired. Counts twice for DPP and FM(N)ADD/SU… 28 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 33 … computational precision floating-point instructions retired. Counts twice for DPP and FM(N)ADD/SU… 38 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 43 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 48 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … [all …]
/freebsd-src/lib/libpmc/pmu-events/arch/x86/sapphirerapids/
H A D	floating-point.json	65 …instructions retired; some instructions will count twice as noted below. Each count represents 2 … 71 …instructions retired; some instructions will count twice as noted below. Each count represents 2 … 76 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 82 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 87 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 93 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 98 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 104 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 109 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 115 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … [all …]
/freebsd-src/lib/libpmc/pmu-events/arch/x86/skylake/
H A D	floating-point.json	3 …ational double precision floating-point instructions retired. Counts twice for DPP and FM(N)ADD/SU… 8 …instructions retired; some instructions will count twice as noted below. Each count represents 2 … 13 …n floating-point instruction retired. Counts twice for DPP and FM(N)ADD/SUB instructions retired.", 18 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 23 … computational precision floating-point instructions retired. Counts twice for DPP and FM(N)ADD/SU… 28 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 33 … computational precision floating-point instructions retired. Counts twice for DPP and FM(N)ADD/SU… 38 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 43 …ational double precision floating-point instructions retired. Counts twice for DPP and FM(N)ADD/SU… 48 …instructions retired; some instructions will count twice as noted below. Each count represents 1 … [all …]
/freebsd-src/lib/libpmc/pmu-events/arch/x86/amdzen2/
H A D	core.json	5 "BriefDescription": "Retired Instructions." 11 …ber of micro-ops retired. This count includes all processor activity (instructions, exceptions, in… 16 "BriefDescription": "Retired Branch Instructions.", 17 …"PublicDescription": "The number of branch instructions retired. This includes all types of archit… 22 "BriefDescription": "Retired Branch Instructions Mispredicted.", 23 …"PublicDescription": "The number of branch instructions retired, of any type, that were not correc… 28 "BriefDescription": "Retired Taken Branch Instructions.", 34 "BriefDescription": "Retired Taken Branch Instructions Mispredicted.", 35 "PublicDescription": "The number of retired taken branch instructions that were mispredicted." 53 "PublicDescription": "The number of near return instructions (RET or RET Iw) retired." [all …]
/freebsd-src/lib/libpmc/pmu-events/arch/x86/amdzen3/
H A D	core.json	5 "BriefDescription": "Retired Instructions." 16 "BriefDescription": "Retired Branch Instructions.", 17 …"PublicDescription": "The number of branch instructions retired. This includes all types of archit… 22 "BriefDescription": "Retired Branch Instructions Mispredicted.", 23 "PublicDescription": "The number of retired branch instructions, that were mispredicted." 28 "BriefDescription": "Retired Taken Branch Instructions.", 34 "BriefDescription": "Retired Taken Branch Instructions Mispredicted.", 35 "PublicDescription": "The number of retired taken branch instructions that were mispredicted." 53 "PublicDescription": "The number of near return instructions (RET or RET Iw) retired." 64 "BriefDescription": "Retired Indirect Branch Instructions Mispredicted.", [all …]
/freebsd-src/lib/libpmc/pmu-events/arch/x86/amdzen1/
H A D	core.json	5 "BriefDescription": "Retired Instructions." 11 …": "The number of uOps retired. This includes all processor activity (instructions, exceptions, in… 16 "BriefDescription": "Retired Branch Instructions.", 17 …"PublicDescription": "The number of branch instructions retired. This includes all types of archit… 22 "BriefDescription": "Retired Branch Instructions Mispredicted.", 23 …"PublicDescription": "The number of branch instructions retired, of any type, that were not correc… 28 "BriefDescription": "Retired Taken Branch Instructions.", 34 "BriefDescription": "Retired Taken Branch Instructions Mispredicted.", 35 "PublicDescription": "The number of retired taken branch instructions that were mispredicted." 53 "PublicDescription": "The number of near return instructions (RET or RET Iw) retired." [all …]
/freebsd-src/lib/libpmc/pmu-events/arch/x86/silvermont/
H A D	pipeline.json	3 "BriefDescription": "Counts the number of branch instructions retired...", 8 …of any branch instructions retired. Branch prediction predicts the branch target and enables the … 12 "BriefDescription": "Counts the number of taken branch instructions retired", 18 … taken branch instructions retired. Branch prediction predicts the branch target and enables the … 23 "BriefDescription": "Counts the number of near CALL branch instructions retired", 28 …r CALL branch instructions retired. Branch prediction predicts the branch target and enables the … 33 "BriefDescription": "Counts the number of far branch instructions retired", 38 …of far branch instructions retired. Branch prediction predicts the branch target and enables the … 43 "BriefDescription": "Counts the number of near indirect CALL branch instructions retired", 48 …t CALL branch instructions retired. Branch prediction predicts the branch target and enables the … [all …]
/freebsd-src/lib/libpmc/pmu-events/arch/x86/broadwellx/
H A D	floating-point.json	3 …instructions retired; some instructions will count twice as noted below. Each count represents 2 … 12 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 21 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 30 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 39 …instructions retired; some instructions will count twice as noted below. Applies to SSE* and AVX* … 48 …instructions retired; some instructions will count twice as noted below. Applies to SSE* and AVX* … 57 …instructions retired; some instructions will count twice as noted below. Each count represents 1 c… 66 …instructions retired; some instructions will count twice as noted below. Each count represents 1 … 75 …instructions retired; some instructions will count twice as noted below. Each count represents 1 … 84 …instructions retired; some instructions will count twice as noted below. Applies to SSE* and AVX* … [all …]
/freebsd-src/lib/libpmc/pmu-events/arch/x86/broadwell/
H A D	floating-point.json	3 …instructions retired; some instructions will count twice as noted below. Each count represents 2 … 12 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 21 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 30 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 39 …instructions retired; some instructions will count twice as noted below. Applies to SSE* and AVX* … 48 …instructions retired; some instructions will count twice as noted below. Applies to SSE* and AVX* … 57 …instructions retired; some instructions will count twice as noted below. Each count represents 1 c… 66 …instructions retired; some instructions will count twice as noted below. Each count represents 1 … 75 …instructions retired; some instructions will count twice as noted below. Each count represents 1 … 84 …instructions retired; some instructions will count twice as noted below. Applies to SSE* and AVX* … [all …]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/RISCV/
H A D	RISCVScheduleV.td	`13 // Used for widening and narrowing instructions as it doesn't contain M8. 32 // For floating-point instructions, SEW won't be 8. 34 // For widening instructions, SEW will not be 64. 283 // 6. Configuration-Setting Instructions 289 // 7.4. Vector Unit-Stride Instructions 295 // 7.5. Vector Strided Instructions 304 // 7.6. Vector Indexed Instructions 323 // 7.8. Vector Segment Instructions 337 // 7.9. Vector Whole Register Instructions 347 // 11. Vector Integer Arithmetic Instructions [all...]`
H A D	RISCVFeatures.td	`77 "'Zicbom' (Cache-Block Management Instructions)">; 80 "'Zicbom' (Cache-Block Management Instructions)">; 84 "'Zicbop' (Cache-Block Prefetch Instructions)">; 87 "'Zicbop' (Cache-Block Prefetch Instructions)">; 91 "'Zicboz' (Cache-Block Zero Instructions)">, 95 "'Zicboz' (Cache-Block Zero Instructions)">; 208 "'A' (Atomic Instructions)">, 212 "'A' (Atomic Instructions)">; 235 "'A' (Atomic Instructions) or " 247 "'Zacas' (Atomic Compare-And-Swap Instructions)">, [all...]`
/freebsd-src/lib/libpmc/pmu-events/arch/x86/alderlake/
H A D	floating-point.json	93 …instructions retired; some instructions will count twice as noted below. Each count represents 2 … 104 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 115 …instructions retired; some instructions will count twice as noted below. Each count represents 4 … 126 …instructions retired; some instructions will count twice as noted below. Each count represents 8 … 137 …instructions retired; some instructions will count twice as noted below. Each count represents 1 … 148 …instructions retired; some instructions will count twice as noted below. Each count represents 1 …
/freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/
H A D	ARMFixupKinds.h	24 // LDRD/LDRH/LDRB/etc. instructions. All bits are encoded. 26 // 10-bit PC relative relocation for symbol addresses used in VFP instructions 31 // of Thumb2 instructions. Also used by LDRD in Thumb mode. 33 // 9-bit PC relative relocation for symbol addresses used in VFP instructions 37 // of Thumb2 instructions. 48 // 24-bit PC relative relocation for conditional branch instructions. 50 // 24-bit PC relative relocation for branch instructions. (unconditional) 53 // instructions. 56 // instructions. 59 // 12-bit fixup for Thumb B instructions. [all …]
/freebsd-src/lib/libpmc/
H A D	pmc.core.3	193 The number of branch instructions executed that were mispredicted at 202 instructions executed. 207 instructions executed that were mispredicted. 210 The number of conditional branch instructions executed. 213 The number of conditional branch instructions executed that were mispredicted. 218 instructions executed. 224 The number of indirect branch instructions executed that were mispredicted. 227 The number of branch instructions executed including speculative branches. 230 The number of branch instructions decoded. 234 The number of branch instructions retired. [all …]
/freebsd-src/lib/libpmc/pmu-events/arch/x86/broadwellde/
H A D	floating-point.json	3 …instructions retired. Each count represents 2 computations. Applies to SSE* and AVX* packed doubl… 12 …instructions retired. Each count represents 4 computations. Applies to SSE* and AVX* packed singl… 21 …instructions retired. Each count represents 4 computations. Applies to SSE* and AVX* packed doubl… 30 …instructions retired. Each count represents 8 computations. Applies to SSE* and AVX* packed singl… 39 …instructions retired. Applies to SSE* and AVXscalar, double and single precision floating-point: … 48 …instructions retired. Applies to SSE and AVX, packed, double and single precision floating-point… 57 …instructions retired. Applies to SSE and AVX* scalar, double and single precision floating-point:… 66 …instructions retired. Each count represents 1 computation. Applies to SSE* and AVX* scalar double… 75 …instructions retired. Each count represents 1 computation. Applies to SSE* and AVX* scalar single… 84 …instructions retired. Applies to SSE* and AVX*scalar, double and single precision floating-point: … [all …]
/freebsd-src/lib/libpmc/pmu-events/arch/x86/knightslanding/
H A D	pipeline.json	3 "BriefDescription": "Counts the number of branch instructions retired", 11 "BriefDescription": "Counts the number of near CALL branch instructions retired.", 20 "BriefDescription": "Counts the number of far branch instructions retired.", 29 "BriefDescription": "Counts the number of near indirect CALL branch instructions retired.", 38 …"BriefDescription": "Counts the number of branch instructions retired that were conditional jumps.… 47 …"BriefDescription": "Counts the number of branch instructions retired that were near indirect CALL… 56 "BriefDescription": "Counts the number of near relative CALL branch instructions retired.", 65 "BriefDescription": "Counts the number of near RET branch instructions retired.", 74 …"BriefDescription": "Counts the number of branch instructions retired that were conditional jumps … 83 "BriefDescription": "Counts the number of mispredicted branch instructions retired", [all …]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/
H A D	RISCVFixupKinds.h	20 // 20-bit fixup corresponding to %hi(foo) for instructions like lui 22 // 12-bit fixup corresponding to %lo(foo) for instructions like addi 24 // 12-bit fixup corresponding to foo-bar for instructions like addi 26 // 12-bit fixup corresponding to %lo(foo) for the S-type store instructions 28 // 20-bit fixup corresponding to %pcrel_hi(foo) for instructions like auipc 30 // 12-bit fixup corresponding to %pcrel_lo(foo) for instructions like addi 33 // instructions 35 // 20-bit fixup corresponding to %got_pcrel_hi(foo) for instructions like 38 // 20-bit fixup corresponding to %tprel_hi(foo) for instructions like lui 40 // 12-bit fixup corresponding to %tprel_lo(foo) for instructions like addi [all …]
/freebsd-src/lib/libpmc/pmu-events/arch/x86/goldmont/
H A D	pipeline.json	3 "BriefDescription": "Retired branch instructions (Precise event capable)", 9 …"PublicDescription": "Counts branch instructions retired for all branch types. This is an archite… 13 "BriefDescription": "Retired taken branch instructions (Precise event capable)", 19 "PublicDescription": "Counts the number of taken branch instructions retired.", 24 "BriefDescription": "Retired near call instructions (Precise event capable)", 30 "PublicDescription": "Counts near CALL branch instructions retired.", 35 "BriefDescription": "Retired far branch instructions (Precise event capable)", 41 …"PublicDescription": "Counts far branch instructions retired. This includes far jump, far call an… 46 "BriefDescription": "Retired near indirect call instructions (Precise event capable)", 52 "PublicDescription": "Counts near indirect CALL branch instructions retired.", [all …]
/freebsd-src/contrib/llvm-project/llvm/include/llvm/MCA/HardwareUnits/
H A D	Scheduler.h	41 /// This method ranks instructions based on their age, and the number of known 55 /// Prioritize older instructions over younger instructions to minimize the in compare() 63 /// Class Scheduler is responsible for issuing instructions to pipeline 68 /// instructions from the dispatch stage, until the write-back stage. 79 // Instructions dispatched to the Scheduler are internally classified based on 84 // unknown. By construction, the WaitSet only contains instructions that are 89 // known. Instructions in the PendingSet can only be in the IS_PENDING or 90 // IS_READY stage. Only IS_READY instructions that are waiting on memory 93 // Instructions in the PendingSet are immediately dominated only by 94 // instructions that have already been issued to the underlying pipelines. In [all …]
/freebsd-src/sys/contrib/device-tree/Bindings/riscv/
H A D	extensions.yaml	86 The standard A extension for atomic instructions, as ratified in the 109 The standard C extension for compressed instructions, as ratified in 183 The Zacas extension for Atomic Compare-and-Swap (CAS) instructions 197 acceleration instructions as ratified at commit 6d33919 ("Merge pull 215 The standard Zbkb bitmanip instructions for cryptography as ratified 221 The standard Zbkc carry-less multiply instructions as ratified 227 The standard Zbkx crossbar permutation instructions as ratified 234 instructions as ratified at commit 6d33919 ("Merge pull request #158 241 RV64 as it contains no instructions") of riscv-code-size-reduction, 249 RV64 as it contains no instructions") o [all...]

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