| /freebsd-src/sys/contrib/device-tree/Bindings/remoteproc/ |
| H A D | ti,omap-remoteproc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/ti,omap-remoteproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Suman Anna <s-anna@ti.com>
13 The OMAP family of SoCs usually have one or more slave processor sub-systems
14 that are used to offload some of the processor-intensive tasks, or to manage
17 The processor cores in the sub-system are usually behind an IOMMU, and may
18 contain additional sub-modules like Internal RAM and/or ROMs, L1 and/or L2
21 The OMAP SoCs usually have a DSP processor sub-system and/or an IPU processor
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| H A D | ti,k3-dsp-rproc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/ti,k3-ds
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| H A D | ti,k3-r5f-rproc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/ti,k3-r5f-rproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI K3 R5F processor subsystems
10 - Suman Anna <s-anna@ti.com>
13 The TI K3 family of SoCs usually have one or more dual-core Arm Cortex R5F
14 processor subsystems/clusters (R5FSS). The dual core cluster can be used
20 AM64x SoCs do not support LockStep mode, but rather a new non-safety mode
21 called "Single-CPU" mode, where only Core0 is used, but with ability to use
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| H A D | xlnx,zynqmp-r5fss.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/xlnx,zynqmp-r5fs
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| H A D | mtk,scp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tingha
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| /freebsd-src/contrib/llvm-project/lldb/source/Plugins/TraceExporter/docs/ |
| H A D | htr.rst | 3 The humongous amount of data processor traces like the ones obtained with Intel PT contain is not d…
6 --------
9 **Block Metadata:** Metadata associated with each *block*. For processor traces, some metadata exam…
17 …**Block Layer:** Composed of blocks - a block in *layer n* refers to a sequence of blocks in *laye…
22 …nstructions/blocks based on its specific purpose - for example, a pass designed to summarize a pro…
24 The image below illustrates the transformation of a trace's representation (HTR)
26 .. image:: media/htr-example.png
30 ------
37 The image below shows the "basic super blocks" of the sequence. Each unique "basic super block" is …
39 .. image:: media/basic_super_block_pass.png
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| /freebsd-src/share/man/man5/ |
| H A D | elf.5 | 60 regardless whether the host is 32-bit or 64-bit.
87 The following types are being used for 32-bit architectures:
88 .Bd -literal -offset indent
89 Elf32_Addr Unsigned 32-bit program address
90 Elf32_Half Unsigned 16-bit field
91 Elf32_Lword Unsigned 64-bit field
92 Elf32_Off Unsigned 32-bit file offset
93 Elf32_Sword Signed 32-bit field or integer
94 Elf32_Word Unsigned 32-bit field or integer
97 For 64-bit architectures we have the following types:
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| /freebsd-src/contrib/processor-trace/libipt/internal/include/ |
| H A D | pt_block_decoder.h | 2 * Copyright (c) 2016-2019, Intel Corporation
41 * It decodes Intel(R) Processor Trace into a sequence of instruction blocks
46 /* The Intel(R) Processor Trace query decoder. */
56 /* The default image. */
59 /* The image. */
60 struct pt_image *image; member
68 /* The current Intel(R) Processor Trace event. */
93 * Errors are reported directly; the status is always a non-negative
94 * pt_status_flag bit-vector.
100 * - tracing is enabled.
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| H A D | pt_insn_decoder.h | 2 * Copyright (c) 2013-2019, Intel Corporation
42 /* The Intel(R) Processor Trace query decoder. */
52 /* The default image. */
55 /* The image. */
56 struct pt_image *image; member
64 /* The current Intel(R) Processor Trace event. */
89 * Errors are reported directly; the status is always a non-negative
90 * pt_status_flag bit-vector.
96 * - tracing is enabled.
100 /* - process @event. */
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| /freebsd-src/contrib/processor-trace/libipt/include/ |
| H A D | intel-pt.h | 2 * Copyright (c) 2013-2019, Intel Corporation
40 /* Intel(R) Processor Trace (Intel PT) decoder library.
44 * - Version
45 * - Errors
46 * - Configuration
47 * - Packet encoder / decoder
48 * - Query decoder
49 * - Traced image
50 * - Instruction flow decoder
51 * - Block decoder
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| H A D | intel-pt.h.in | 2 * Copyright (c) 2013-2019, Intel Corporation
40 /* Intel(R) Processor Trace (Intel PT) decoder library.
44 * - Version
45 * - Errors
46 * - Configuration
47 * - Packet encoder / decoder
48 * - Query decoder
49 * - Traced image
50 * - Instruction flow decoder
51 * - Block decoder
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| /freebsd-src/contrib/file/magic/Magdir/ |
| H A D | apple | 2 #----------
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| /freebsd-src/sys/cddl/contrib/opensolaris/uts/common/sys/ |
| H A D | isa_defs.h | 34 * be divided into two groups; characteristics of the processor and
35 * implementation choices for Solaris on a processor.
37 * Processor Characteristics:
40 * The natural byte order of the processor. A pointer to an int points
44 * The processor specific direction of stack growth. A push onto the
58 * The processor (or supported implementations of the processor)
59 * supports the ieee-754 floating point standard. No other floating
61 * floating point formats are expected to be cased on the ISA processor
69 * Hence, it has the properties of a processor characteristic.
76 * well. The values are expressed in "byte-alignment" units.
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| /freebsd-src/sys/contrib/device-tree/Bindings/media/ |
| H A D | mediatek-vpu.txt | 1 * Mediatek Video Processor Unit
3 Video Processor Unit is a HW video controller. It controls HW Codec including
4 H.264/VP8/VP9 Decode, H.264/VP8 Encode and Image Processor (scale/rotate/color convert).
7 - compatible: "mediatek,mt8173-vpu"
8 - reg: Must contain an entry for each entry in reg-names.
9 - reg-names: Must include the following entries:
12 - interrupts: interrupt number to the cpu.
13 - clocks : clock name from clock manager
14 - clock-names: must be main. It is the main clock of VPU
17 - memory-region: phandle to a node describing memory (see
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| H A D | renesas,imr.txt | 1 Renesas R-Car Image Renderer (Distortion Correction Engine)
2 -----------------------------------------------------------
4 The image renderer, or the distortion correction engine, is a drawing processor
11 - compatible: "renesas,<soctype>-imr-lx4", "renesas,imr-lx4" as a fallback for
12 the image renderer light extended 4 (IMR-LX4) found in the R-Car gen3 SoCs,
14 - "renesas,r8a7795-imr-lx4" for R-Car H3,
15 - "renesas,r8a7796-imr-lx4" for R-Car M3-W.
16 - reg: offset and length of the register block;
17 - interrupts: single interrupt specifier;
18 - clocks: single clock phandle/specifier pair;
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| H A D | exynos4-fimc-is.txt | 1 Exynos4x12 SoC series Imaging Subsystem (FIMC-IS)
3 The FIMC-IS is a subsystem for processing image signal from an image sensor.
4 The Exynos4x12 SoC series FIMC-IS V1.5 comprises of a dedicated ARM Cortex-A5
5 processor, ISP, DRC and FD IP blocks and peripheral devices such as UART, I2C
8 fimc-is node
9 ------------
12 - compatible : should be "samsung,exynos4212-fimc-is" for Exynos4212 and
14 - reg : physical base address and length of the registers set;
15 - interrupts : must contain two FIMC-IS interrupts, in order: ISP0, ISP1;
16 - clocks : list of clock specifiers, corresponding to entries in
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| H A D | renesas,imr.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car Image Renderer (Distortion Correction Engine)
10 - Sergei Shtylyov <sergei.shtylyov@gmail.com>
13 The image renderer, or the distortion correction engine, is a drawing
14 processor with a simple instruction system capable of referencing video
19 The image renderer light extended 4 (IMR-LX4) is found in R-Car Gen3 SoCs.
24 - enum:
25 - renesas,r8a7795-imr-lx4 # R-Car H3
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| /freebsd-src/share/doc/psd/01.cacm/ |
| H A D | p3 | 8 .IT image
10 It includes a memory image,
14 An image is the current state of a pseudo-computer.
18 is the execution of an image.
19 While the processor is executing on behalf of a process,
20 the image must reside in main memory;
22 unless the appearance of an active, higher-priority
26 The user-memory part of an image is divided into three logical segments.
28 During execution, this segment is write-protected
32 virtual address space begins a non-shared, writable data segment,
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| /freebsd-src/sys/contrib/device-tree/Bindings/media/i2c/ |
| H A D | aptina,mt9v111.txt | 2 ----------------------------
4 The Aptina MT9V111 is a 1/4-Inch VGA-format digital image sensor with a core
5 based on Aptina MT9V011 sensor and an integrated Image Flow Processor (IFP).
8 of image resolution and formats controllable through a simple two-wires
12 --------------------
14 - compatible: shall be "aptina,mt9v111".
15 - clocks: reference to the system clock input provider.
18 --------------------
20 - enable-gpios: output enable signal, pin name "OE#". Active low.
21 - standby-gpios: low power state control signal, pin name "STANDBY".
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| H A D | aptina,mt9v111.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jacopo Mondi <jacopo@jmondi.org>
13 The Aptina MT9V111 is a 1/4-Inch VGA-format digital image sensor with a core
14 based on Aptina MT9V011 sensor and an integrated Image Flow Processor (IFP).
17 of image resolutions and formats controllable through a simple two-wires
30 enable-gpios:
34 standby-gpios:
39 reset-gpios:
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| H A D | galaxycore,gc2145.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schema
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| /freebsd-src/share/man/man8/ |
| H A D | crash.8 | 44 .Bl -diag -offset indent
56 will then resume multi-user operations.
62 the error, or a two-word description of the inconsistency.
73 .Bl -diag -compact
118 .\" .Bl -column xxxx -offset indent
142 .\" (see the 68020 manual, page 6-17)
145 .\" Additionally, the kernel will dump about a screenful of semi-useful
151 .\" ``ps'' (hex) is the 68020 processor status register ``ps''.
160 .\" VAX-like
164 .\" .Bd -ragged -offset indent
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| /freebsd-src/sys/contrib/device-tree/Bindings/fpga/ |
| H A D | fpga-region.txt | 6 - Introduction
7 - Terminology
8 - Sequence
9 - FPGA Region
10 - Supported Use Models
11 - Device Tree Examples
12 - Constraints
42 * A base (or static) FPGA image may create a set of PRR's that later may
45 * The connections at the edge of each PRR are fixed. The image that is loaded
52 * An FPGA image that is designed to be loaded into a PRR. There may be
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| /freebsd-src/sys/contrib/device-tree/Bindings/display/samsung/ |
| H A D | samsung,exynos5433-mic.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/display/samsung/samsung,exynos5433-mic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung Exynos5433 SoC Mobile Image Compressor (MIC)
10 - Inki Dae <inki.dae@samsung.com>
11 - Seung-Woo Kim <sw0312.kim@samsung.com>
12 - Kyungmin Park <kyungmin.park@samsung.com>
13 - Krzysztof Kozlowski <krzk@kernel.org>
16 MIC (Mobile Image Compressor) resides between DECON and MIPI DSI. MIPI DSI is
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| /freebsd-src/sys/contrib/device-tree/Bindings/soc/intel/ |
| H A D | intel,hps-copy-engine.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/soc/intel/intel,hps-copy-engine.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Matthew Gerlach <matthew.gerlach@linux.intel.com>
14 The Intel Hard Processor System (HPS) Copy Engine is an IP block used to copy
15 a bootable image from host memory to HPS DDR. Additionally, there is a
16 register the HPS can use to indicate the state of booting the copied image as
17 well as a keep-a-live indication to the host.
21 const: intel,hps-copy-engine
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