Home
last modified time | relevance | path

Searched +full:ifc +full:- +full:nand (Results 1 – 25 of 32) sorted by relevance

12

/freebsd-src/sys/contrib/device-tree/Bindings/memory-controllers/fsl/
H A Difc.txt4 - name : Should be ifc
5 - compatible : should contain "fsl,ifc". The version of the integrated
9 - #address-cells : Should be either two or three. The first cell is the
12 - #size-cells : Either one or two, depending on how large each chipselect
14 - reg : Offset and length of the register set for the device
15 - interrupts: IFC may have one or two interrupts. If two interrupt
17 interrupt (CM_EVTER_STAT), and the second is the NAND
21 - little-endian : If this property is absent, the big-endian mode will
24 - ranges : Each range corresponds to a single chipselect, and covers
27 Child device nodes describe the devices connected to IFC such as NOR (e.g.
[all …]
H A Dfsl,ifc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controller
[all...]
/freebsd-src/sys/contrib/device-tree/src/powerpc/fsl/
H A Dc293pcie.dts35 /include/ "c293si-pre.dtsi"
45 ifc: memory-controller@fffe1e000 { label
73 &ifc {
75 #address-cells = <1>;
76 #size-cells = <1>;
77 compatible = "cfi-flash";
79 bank-width = <2>;
80 device-width = <1>;
107 /* 512KB for u-boo
[all...]
H A Dbsc9131rdb.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright 2011-2012 Freescale Semiconductor Inc.
8 /include/ "bsc9131si-pre.dtsi"
18 board_ifc: ifc: memory-controller@ff71e000 {
19 /* NAND Flas
[all...]
H A Dbsc9132qds.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /include/ "bsc9132si-pre.dtsi"
18 ifc: memory-controller@ff71e000 { label
19 /* NOR, NAND Flash on board */
46 /include/ "bsc9132si-pos
[all...]
H A Dbsc9132qds.dtsi2 * BSC9132 QDS Device Tree Source stub (no addresses or top-level ranges)
35 &ifc {
37 #address-cells = <1>;
38 #size-cells = <1>;
39 compatible = "cfi-flash";
41 bank-width = <2>;
42 device-width = <1>;
45 nand@1,0 {
46 #address-cells = <1>;
47 #size-cells = <1>;
[all …]
H A Db4qds.dtsi4 * Copyright 2012 - 2015 Freescale Semiconductor, Inc.
38 #address-cells = <2>;
39 #size-cells = <2>;
40 interrupt-parent = <&mpic>;
50 ifc: localbus@ffe124000 { label
57 #address-cells = <1>;
58 #size-cells = <1>;
59 compatible = "cfi-flash";
61 bank-width = <2>;
62 device-width = <1>;
[all …]
H A Dp1010rdb_36b.dtsi2 * P1010 RDB Device Tree Source stub (no addresses or top-level ranges)
39 board_ifc: ifc: memory-controller@fffe1e000 {
40 /* NOR, NAND Flashes and CPLD on board */
H A Dp1010rdb_32b.dtsi2 * P1010 RDB Device Tree Source stub (no addresses or top-level ranges)
39 board_ifc: ifc: memory-controller@ffe1e000 {
40 /* NOR, NAND Flashes and CPLD on board */
H A Dt1023rdb.dts35 /include/ "t102xsi-pre.dtsi"
40 #address-cells = <2>;
41 #size-cells = <2>;
42 interrupt-parent = <&mpic>;
44 reserved-memory {
45 #address-cells = <2>;
46 #size-cells = <2>;
49 bman_fbpr: bman-fbpr {
54 qman_fqd: qman-fqd {
59 qman_pfdr: qman-pfdr {
[all …]
H A Dt208xrdb.dtsi2 * T2080PCIe-RDB Board Device Tree Source
38 #address-cells = <2>;
39 #size-cells = <2>;
40 interrupt-parent = <&mpic>;
42 reserved-memory {
43 #address-cells = <2>;
44 #size-cells = <2>;
47 bman_fbpr: bman-fbpr {
51 qman_fqd: qman-fqd {
55 qman_pfdr: qman-pfdr {
[all …]
H A Dbsc9131rdb.dtsi2 * BSC9131 RDB Device Tree Source stub (no addresses or top-level ranges)
4 * Copyright 2011-2012 Freescale Semiconductor Inc.
37 nand@0,0 {
38 #address-cells = <1>;
39 #size-cells = <1>;
40 compatible = "fsl,ifc-nand";
54 #address-cells = <1>;
55 #size-cells = <1>;
56 compatible = "spansion,s25sl12801", "jedec,spi-nor";
58 spi-max-frequency = <50000000>;
[all …]
H A Dt104xrdb.dtsi4 * Copyright 2014 - 2015 Freescale Semiconductor Inc.
42 reserved-memory {
43 #address-cells = <2>;
44 #size-cells = <2>;
47 bman_fbpr: bman-fbpr {
51 qman_fqd: qman-fqd {
55 qman_pfdr: qman-pfdr {
61 ifc: localbus@ffe124000 { label
68 #address-cells = <1>;
69 #size-cells = <1>;
[all …]
H A Dkmcent2.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 * Copyright 2014 - 2015 Freescale Semiconductor Inc.
11 /include/ "t104xsi-pre.dtsi"
21 reserved-memory {
22 #address-cells = <2>;
23 #size-cells = <2>;
26 bman_fbpr: bman-fbpr {
30 qman_fqd: qman-fqd {
34 qman_pfdr: qman-pfdr {
40 ifc: localbus@ffe124000 { label
[all …]
H A Dt1024rdb.dts35 /include/ "t102xsi-pre.dtsi"
40 #address-cells = <2>;
41 #size-cells = <2>;
42 interrupt-parent = <&mpic>;
48 reserved-memory {
49 #address-cells = <2>;
50 #size-cells = <2>;
53 bman_fbpr: bman-fbpr {
58 qman_fqd: qman-fqd {
63 qman_pfdr: qman-pfd
69 ifc: localbus@ffe124000 { global() label
[all...]
/freebsd-src/sys/contrib/device-tree/src/arm64/freescale/
H A Dfsl-ls1046a-frwy.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Freescale Layerscape-1046A family SoC.
9 /dts-v1/;
11 #include "fsl-ls1046a.dtsi"
15 compatible = "fsl,ls1046a-frwy", "fsl,ls1046a";
25 stdout-path = "serial0:115200n8";
28 sb_3v3: regulator-sb3v3 {
29 compatible = "regulator-fixed";
30 regulator-name = "LT8642SEV-3.3V";
31 regulator-min-microvolt = <3300000>;
[all …]
H A Dfsl-ls1046a-rdb.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Freescale Layerscape-1046A family SoC.
6 * Copyright 2019-2020 NXP
11 /dts-v1/;
13 #include "fsl-ls1046a.dtsi"
17 compatible = "fsl,ls1046a-rdb", "fsl,ls1046a";
27 stdout-path = "serial0:115200n8";
40 mmc-hs200-1_8v;
41 sd-uhs-sdr104;
42 sd-uhs-sdr50;
[all …]
H A Dfsl-ls208xa-rdb.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 * Copyright 2017-2020 NXP
16 &ifc {
18 #address-cells = <2>;
19 #size-cells = <1>;
25 #address-cells = <1>;
26 #size-cells = <1>;
27 compatible = "cfi-flas
[all...]
H A Dfsl-ls1088a-qds.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
11 /dts-v1/;
13 #include "fsl-ls1088a.dtsi"
17 compatible = "fsl,ls1088a-qds", "fsl,ls1088a";
21 bus-num = <0>;
25 #address-cells = <1>;
26 #size-cells = <1>;
27 compatible = "jedec,spi-no
[all...]
H A Dfsl-ls1043a-rdb.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Freescale Layerscape-1043A family SoC.
5 * Copyright 2014-2015 Freescale Semiconductor, Inc.
11 /dts-v1/;
12 #include "fsl-ls1043a.dtsi"
16 compatible = "fsl,ls1043a-rdb", "fsl,ls1043a";
26 stdout-path = "serial0:115200n8";
36 shunt-resisto
[all...]
H A Dfsl-ls1088a-rdb.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Copyright 2017-2020 NXP
11 /dts-v1/;
13 #include "fsl-ls1088a.dtsi"
17 compatible = "fsl,ls1088a-rdb", "fsl,ls1088a";
21 phy-handle = <&mdio2_aquantia_phy>;
22 phy-connection-typ
[all...]
H A Dfsl-ls208xa-qds.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
14 phy-handle = <&mdio0_phy12>;
15 phy-connection-type = "sgmii";
19 phy-handle = <&mdio0_phy13>;
20 phy-connection-type = "sgmii";
24 phy-handl
[all...]
H A Dfsl-ls1046a-qds.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Freescale Layerscape-1046A family SoC.
6 * Copyright 2018-2019 NXP
11 /dts-v1/;
13 #include "fsl-ls1046a.dtsi"
17 compatible = "fsl,ls1046a-qds", "fsl,ls1046a";
20 emi1-slot1 = &ls1046mdio_s1;
21 emi1-slot
[all...]
H A Dfsl-ls1043a-qds.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Freescale Layerscape-1043A family SoC.
5 * Copyright 2014-2015 Freescale Semiconductor, Inc.
6 * Copyright 2018-2021 NXP
11 /dts-v1/;
12 #include "fsl-ls1043a.dtsi"
16 compatible = "fsl,ls1043a-qds", "fsl,ls1043a";
27 sgmii-rise
[all...]
/freebsd-src/sys/contrib/device-tree/src/arm/nxp/ls/
H A Dls1021a-qds.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright 2013-2014 Freescale Semiconductor, Inc.
7 /dts-v1/;
12 compatible = "fsl,ls1021a-qds", "fsl,ls1021a";
22 sys_mclk: clock-mclk {
23 compatible = "fixed-clock";
24 #clock-cells = <0>;
25 clock-frequency = <24576000>;
29 compatible = "regulator-fixed";
30 regulator-name = "3P3V";
[all …]

12