Home
last modified time | relevance | path

Searched +full:i2c +full:- +full:parent (Results 1 – 25 of 1018) sorted by relevance

12345678910>>...41

/freebsd-src/sys/contrib/device-tree/Bindings/i2c/
H A Di2c-mux-gpmux.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-mux-gpmux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: General Purpose I2C Bus Mux
10 - Peter Rosin <peda@axentia.se>
13 This binding describes an I2C bus multiplexer that uses a mux controller
14 from the mux subsystem to route the I2C signals.
16 .-----. .-----.
18 .------------. '-----' '-----'
[all …]
H A Di2c-mux-gpmux.txt1 General Purpose I2C Bus Mux
3 This binding describes an I2C bus multiplexer that uses a mux controller
4 from the mux subsystem to route the I2C signals.
6 .-----. .-----.
8 .------------. '-----' '-----'
10 | | .--------+--------'
11 | .------. | .------+ child bus A, on MUX value set to 0
12 | | I2C |-|--| Mux |
13 | '------' | '--+---+ child bus B, on MUX value set to 1
14 | .------. | | '----------+--------+--------.
[all …]
H A Di2c-demux-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2
[all...]
H A Di2c-mux-reg.txt1 Register-based I2C Bus Mux
3 This binding describes an I2C bus multiplexer that uses a single register
4 to route the I2C signals.
7 - compatible: i2c-mux-reg
8 - i2c-parent: The phandle of the I2C bus that this multiplexer's master-side
10 * Standard I2C mux properties. See i2c-mux.yaml in this directory.
11 * I2C child bus nodes. See i2c-mux.yaml in this directory.
14 - reg: this pair of <offset size> specifies the register to control the mux.
15 The <offset size> depends on its parent node. It can be any memory-mapped
18 - little-endian: The existence indicates the register is in little endian.
[all …]
H A Di2c-demux-pinctrl.txt1 Pinctrl-based I2C Bus DeMux
3 This binding describes an I2C bus demultiplexer that uses pin multiplexing to
4 route the I2C signals, and represents the pin multiplexing configuration using
5 the pinctrl device tree bindings. This may be used to select one I2C IP core at
6 runtime which may have a better feature set for a given task than another I2C
10 +-------------------------------+
12 | | +-----+ +-----+
13 | +------------+ | | dev | | dev |
14 | |I2C IP Core1|--\ | +-----+ +-----+
15 | +------------+ \-------+ | | |
[all …]
H A Di2c-mpc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2
[all...]
H A Di2c-mpc.txt1 * I2C
5 - reg : Offset and length of the register set for the device
6 - compatible : should be "fsl,CHIP-i2c" where CHIP is the name of a
9 "fsl,mpc5121-i2c-ctrl" is required as shown in the example below.
13 - interrupts : <a b> where a is the interrupt number and b is a
18 - fsl,preserve-clocking : boolean; if defined, the clock settings
20 - clock-frequency : desired I2C bus clock frequency in Hz.
21 - fsl,timeout : I2C bus timeout in microseconds.
26 i2c@1740 {
27 #address-cells = <1>;
[all …]
H A Di2c-mux-pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-mux-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Pinctrl-based I2C Bus Mux
10 - Wolfram Sang <wsa@kernel.org>
13 This binding describes an I2C bus multiplexer that uses pin multiplexing to route the I2C
17 +-----+ +-----+
19 +------------------------+ +-----+ +-----+
21 | /----|------+--------+
[all …]
H A Di2c-arb-gpio-challenge.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-arb-gpio-challenge.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: GPIO-based I2C Arbitration Using a Challenge & Response Mechanism
10 - Doug Anderson <dianders@chromium.org>
11 - Peter Rosin <peda@axentia.se>
15 the master of an I2C bus in a multimaster situation.
18 standard I2C multi-master rules. Using GPIOs is generally useful in the case
23 * It is nonstandard (not using standard I2C multimaster)
[all …]
H A Di2c-mux-gpio.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-mu
[all...]
/freebsd-src/sys/contrib/device-tree/src/loongarch/
H A Dloongson-2k0500.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/clock/loongson,ls2k-clk.h>
12 #address-cells = <2>;
13 #size-cell
[all...]
H A Dloongson-2k1000.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/clock/loongson,ls2k-clk.h>
10 #include <dt-bindings/gpio/gpio.h>
13 #address-cell
[all...]
/freebsd-src/sys/contrib/device-tree/src/arm64/apple/
H A Dt600x-die0.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
10 nco: clock-controller@28e03c000 {
11 compatible = "apple,t6000-nco", "apple,nco";
14 #clock-cells = <1>;
17 aic: interrupt-controller@28e100000 {
18 compatible = "apple,t6000-aic", "apple,aic2";
19 #interrupt-cells = <4>;
20 interrupt-controller;
23 reg-names = "core", "event";
24 power-domains = <&ps_aic>;
[all …]
/freebsd-src/sys/contrib/device-tree/src/mips/ingenic/
H A Djz4780.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/ingenic,jz4780-cgu.h>
3 #include <dt-bindings/clock/ingenic,tcu.h>
4 #include <dt-bindings/dma/jz4780-dma.h>
7 #address-cells = <1>;
8 #size-cells = <1>;
12 #address-cells = <1>;
13 #size-cells = <0>;
17 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
21 clock-names = "cpu";
[all …]
H A Dx1830.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/ingenic,tcu.h>
3 #include <dt-bindings/clock/ingenic,x1830-cgu.h>
4 #include <dt-bindings/dma/x1830-dma.h>
7 #address-cells = <1>;
8 #size-cells = <1>;
12 #address-cells = <1>;
13 #size-cells = <0>;
17 compatible = "ingenic,xburst-fpu2.0-mxu2.0";
21 clock-names = "cpu";
[all …]
/freebsd-src/sys/contrib/device-tree/src/arc/
H A Dabilis_tb10x.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
12 compatible = "abilis,arc-tb10x";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 #address-cells = <1>;
18 #size-cells = <0>;
28 compatible = "snps,arc-timer";
30 interrupt-parent = <&intc>;
36 compatible = "snps,arc-timer";
41 #address-cells = <1>;
[all …]
/freebsd-src/sys/contrib/device-tree/src/mips/brcm/
H A Dbcm7420.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <93750000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
[all …]
H A Dbcm7125.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <202500000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
[all …]
H A Dbcm7358.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <375000000>;
24 cpu_intc: interrupt-controller {
25 #address-cells = <0>;
26 compatible = "mti,cpu-interrupt-controller";
28 interrupt-controller;
[all …]
H A Dbcm7346.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <163125000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
[all …]
H A Dbcm7360.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <375000000>;
24 cpu_intc: interrupt-controller {
25 #address-cells = <0>;
26 compatible = "mti,cpu-interrupt-controller";
28 interrupt-controller;
[all …]
/freebsd-src/sys/contrib/device-tree/src/arm/aspeed/
H A Daspeed-bmc-ampere-mtmitchell.dts1 // SPDX-License-Identifier: GPL-2.0-only
4 /dts-v1/;
6 #include "aspeed-g6.dtsi"
7 #include <dt-bindings/i2c/i2c.h>
8 #include <dt-binding
[all...]
H A Daspeed-bmc-ampere-mtjade.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
3 #include "aspeed-g5.dtsi"
4 #include <dt-bindings/gpio/aspeed-gpio.h>
8 compatible = "ampere,mtjade-bmc", "aspeed,ast2500";
12 * i2c bus 50-5
[all...]
/freebsd-src/sys/dts/arm/
H A Dimx53x.dtsi34 #address-cells = <1>;
35 #size-cells = <1>;
43 #address-cells = <1>;
44 #size-cells = <0>;
50 d-cache-line-size = <32>;
51 i-cache-line-size = <32>;
52 d-cache-size = <0x8000>;
53 i-cache-size = <0x8000>;
54 l2-cache-line-size = <32>;
55 l2-cache-line = <0x40000>;
[all …]
H A Dvybrid.dtsi1 /*-
2 * Copyright (c) 2013-2014 Ruslan Bukin <br@bsdpad.com>
30 #address-cells = <1>;
31 #size-cells = <1>;
33 interrupt-parent = <&GIC>;
52 #address-cells = <1>;
53 #size-cells = <1>;
54 compatible = "simple-bus";
56 bus-frequency = <0>;
59 compatible = "fsl,mvf600-src";
[all …]

12345678910>>...41