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/freebsd-src/sys/contrib/device-tree/Bindings/display/mediatek/
H A Dmediatek,ethdr.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11 - Philipp Zabel <p.zabel@pengutronix.de>
14 ETHDR (ET High Dynamic Range) is a MediaTek internal HDR engine and is
15 designed for HDR video and graphics conversion in the external display path.
16 It handles multiple HDR input types and performs tone mapping, color
18 output the required HDR or SDR signal to the subsequent display path.
19 This engine is composed of two video frontends, two graphic frontends,
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/freebsd-src/usr.sbin/ypldap/
H A Dypldap_dns.c4 * Copyright (c) 2003-2008 Henning Brauer <henning@openbsd.org>
68 log_info("dns engine exiting"); in dns_shutdown()
82 case -1: in ypldap_dns()
91 setproctitle("dns engine"); in ypldap_dns()
94 if (setgroups(1, &pw->pw_gid) || in ypldap_dns()
95 setresgid(pw->pw_gid, pw->pw_gid, pw->pw_gid) || in ypldap_dns()
96 setresuid(pw->pw_uid, pw->pw_uid, pw->pw_uid)) in ypldap_dns()
111 env.sc_iev->events = EV_READ; in ypldap_dns()
112 env.sc_iev->data = &env; in ypldap_dns()
113 imsg_init(&env.sc_iev->ibuf, pipe_ntp[1]); in ypldap_dns()
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/freebsd-src/sys/contrib/ncsw/Peripherals/FM/Pcd/
H A Dfm_pcd.h2 * Copyright 2008-2012 Freescale Semiconductor Inc.
132 volatile uint32_t fmpl_gcr; /* 0x000 FMPL_GCR - FM Policer General Configuration */
133 volatile uint32_t fmpl_gsr; /* 0x004 FMPL_GSR - FM Policer Global Status Register */
134 volatile uint32_t fmpl_evr; /* 0x008 FMPL_EVR - FM Policer Event Register */
135 volatile uint32_t fmpl_ier; /* 0x00C FMPL_IER - FM Policer Interrupt Enable Register */
136 volatile uint32_t fmpl_ifr; /* 0x010 FMPL_IFR - FM Policer Interrupt Force Register */
137 volatile uint32_t fmpl_eevr; /* 0x014 FMPL_EEVR - FM Policer Error Event Register */
138 …volatile uint32_t fmpl_eier; /* 0x018 FMPL_EIER - FM Policer Error Interrupt Enable Registe…
139 …volatile uint32_t fmpl_eifr; /* 0x01C FMPL_EIFR - FM Policer Error Interrupt Force Register…
141 volatile uint32_t fmpl_rpcnt; /* 0x020 FMPL_RPC - FM Policer RED Packets Counter */
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H A Dfm_manip.c2 * Copyright 2008-2012 Freescale Semiconductor Inc.
65 p_CurManip = p_CurManip->h_PrevManip; in GetManipInfo()
71 return p_CurManip->p_Hmct; in GetManipInfo()
73 return p_CurManip->h_Ad; in GetManipInfo()
87 return p_Manip->tableSize; in GetHmctSize()
91 p_CurManip = p_CurManip->h_PrevManip; in GetHmctSize()
95 size += p_CurManip->tableSize; in GetHmctSize()
96 p_CurManip = (t_FmPcdManip *)p_CurManip->h_NextManip; in GetHmctSize()
98 size += p_CurManip->tableSize; /* add last size */ in GetHmctSize()
109 return p_Manip->dataSize; in GetDataSize()
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H A Dfm_cc.c2 * Copyright 2008-2012 Freescale Semiconductor Inc.
65 if (FmPcdLockTryLock(p_FmPcdCcTree->p_Lock)) in CcRootTryLock()
77 FmPcdLockUnlock(p_FmPcdCcTree->p_Lock); in CcRootReleaseLock()
86 intFlags = XX_LockIntrSpinlock(p_CcNode->h_Spinlock); in UpdateNodeOwner()
89 p_CcNode->owners++; in UpdateNodeOwner()
92 ASSERT_COND(p_CcNode->owners); in UpdateNodeOwner()
93 p_CcNode->owners--; in UpdateNodeOwner()
96 XX_UnlockIntrSpinlock(p_CcNode->h_Spinlock, intFlags); in UpdateNodeOwner()
118 NCSW_LIST_AddToTail(&p_StatsObj->node, p_List); in EnqueueStatsObj()
130 FM_MURAM_FreeMem(h_FmMuram, p_StatsObj->h_StatsAd); in FreeStatObjects()
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H A Dfm_kg.c2 * Copyright 2008-2012 Freescale Semiconductor Inc.
61 return XX_LockIntrSpinlock(((t_FmPcdKg *)h_FmPcdKg)->h_HwSpinlock); in KgHwLock()
67 XX_UnlockIntrSpinlock(((t_FmPcdKg *)h_FmPcdKg)->h_HwSpinlock, intFlags); in KgHwUnlock()
73 return FmPcdLockSpinlock(((t_FmPcdKgScheme *)h_Scheme)->p_Lock); in KgSchemeLock()
79 FmPcdUnlockSpinlock(((t_FmPcdKgScheme *)h_Scheme)->p_Lock, intFlags); in KgSchemeUnlock()
85 return FmPcdLockTryLock(((t_FmPcdKgScheme *)h_Scheme)->p_Lock); in KgSchemeFlagTryLock()
91 FmPcdLockUnlock(((t_FmPcdKgScheme *)h_Scheme)->p_Lock); in KgSchemeFlagUnlock()
97 struct fman_kg_regs *regs = p_FmPcd->p_FmPcdKg->p_FmPcdKgRegs; in WriteKgarWait()
194 static uint8_t GetGenHdrCode(e_NetHeaderType hdr, e_FmPcdHdrIndex hdrIndex, bool ignoreProtocolVali… in GetGenHdrCode() argument
197 switch (hdr) in GetGenHdrCode()
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/freebsd-src/sys/contrib/dev/athk/ath10k/
H A Dhw.c1 // SPDX-License-Identifier: ISC
3 * Copyright (c) 2014-2017 Qualcomm Atheros, Inc.
15 #include "wmi-ops.h"
91 * CE0 and CE1 no other copy engine is directly referred in the code.
94 * Copy Engine Address
129 * Copy Engine Address
559 survey->filled |= SURVEY_INFO_TIME | in ath10k_hw_fill_survey_time()
562 wraparound_type = ar->hw_params.cc_wraparound_type; in ath10k_hw_fill_survey_time()
569 survey->filled &= ~SURVEY_INFO_TIME_BUSY; in ath10k_hw_fill_survey_time()
584 cc -= cc_prev - cc_fix; in ath10k_hw_fill_survey_time()
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H A Dhtc.c1 // SPDX-License-Identifier: ISC
3 * Copyright (c) 2005-2011 Atheros Communications Inc.
4 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
34 WARN_ONCE((unsigned long)skb->data & 3, "unaligned skb"); in ath10k_htc_build_tx_ctrl_skb()
48 if (htc->ar->bus_param.dev_type != ATH10K_DEV_TYPE_HL) in ath10k_htc_restore_tx_skb()
49 dma_unmap_single(htc->ar->dev, skb_cb->paddr, skb->len, DMA_TO_DEVICE); in ath10k_htc_restore_tx_skb()
56 struct ath10k *ar = ep->htc->ar; in ath10k_htc_notify_tx_completion()
57 struct ath10k_htc_hdr *hdr; in ath10k_htc_notify_tx_completion() local
60 ep->eid, skb); in ath10k_htc_notify_tx_completion()
63 * copy engine is processing it due to which host unmaps corresponding in ath10k_htc_notify_tx_completion()
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H A Dpci.c1 // SPDX-License-Identifier: ISC
3 * Copyright (c) 2005-2011 Atheros Communications Inc.
4 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
62 /* PCI-E QCA988X V2 (Ubiquiti branded) */
65 { PCI_VDEVICE(ATHEROS, QCA988X_2_0_DEVICE_ID) }, /* PCI-E QCA988X V2 */
66 { PCI_VDEVICE(ATHEROS, QCA6164_2_1_DEVICE_ID) }, /* PCI-E QCA6164 V2.1 */
67 { PCI_VDEVICE(ATHEROS, QCA6174_2_1_DEVICE_ID) }, /* PCI-E QCA6174 V2.1 */
68 { PCI_VDEVICE(ATHEROS, QCA99X0_2_0_DEVICE_ID) }, /* PCI-E QCA99X0 V2 */
69 { PCI_VDEVICE(ATHEROS, QCA9888_2_0_DEVICE_ID) }, /* PCI-E QCA9888 V2 */
70 { PCI_VDEVICE(ATHEROS, QCA9984_1_0_DEVICE_ID) }, /* PCI-E QCA9984 V1 */
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H A Dsnoc.c1 // SPDX-License-Identifier: ISC
46 "vdd-0.8-cx-mx",
47 "vdd-1.8-xo",
48 "vdd-1.3-rfa",
49 "vdd-3.3-ch0",
50 "vdd-3.3-ch1",
136 /* CE0: host->target HTC control streams */
145 /* CE1: target->host HTT + HTC control */
154 /* CE2: target->host WMI */
163 /* CE3: host->target WMI */
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H A Dhtt.h1 /* SPDX-License-Identifier: ISC */
3 * Copyright (c) 2005-2011 Atheros Communications Inc.
4 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
31 /* bits 5-23 currently reserved */
36 enum htt_h2t_msg_type { /* host-to-target */
59 u8 pad[sizeof(u32) - sizeof(struct htt_cmd_hdr)];
76 * but the host shall use the bit-mast + bit-shift defs, to be endian-
178 * htt_data_tx_desc - used for data tx path
181 * ext_tid: for qos-data frames (0-15), see %HTT_DATA_TX_EXT_TID_
202 u8 prefetch[0]; /* start of frame, for FW classification engine */
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H A Dcore.c1 // SPDX-License-Identifier: ISC
3 * Copyright (c) 2005-2011 Atheros Communications Inc.
4 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
5 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
21 #include <linux/nvmem-consumer.h>
33 #include "wmi-ops.h"
65 MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software");
473 * or 2x2 160Mhz, long-guard-interval.
523 * 1x1 160Mhz, long-guard-interval.
741 [ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx",
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/freebsd-src/sys/dev/bnxt/bnxt_re/
H A Dbnxt_re.h2 * Copyright (c) 2015-2024, Broadcom. All rights reserved. The term
99 * min_not_zero - return the minimum that is _not_ zero, unless both are zero
165 ((rdev)->chip_ctx->hwrm_cmd_max_timeout * 1000)
184 #define BNXT_RE_MSIX_FROM_MOD_PARAM -1
390 spin_lock(&(_rdev)->res_list[_type].lock); \
391 list_add_tail(&(_res)->dbr_list, \
392 &(_rdev)->res_list[_type].head); \
393 spin_unlock(&(_rdev)->res_list[_type].lock); \
398 spin_lock(&(_rdev)->res_lis
966 bnxt_re_init_hwrm_hdr(struct bnxt_re_dev * rdev,struct input * hdr,u16 opcd,u16 crid,u16 trid) bnxt_re_init_hwrm_hdr() argument
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/freebsd-src/contrib/wpa/src/eap_peer/
H A Deap.h3 * Copyright (c) 2004-2012, Jouni Malinen <j@w1.fi>
29 * enum eapol_bool_var - EAPOL boolean state variables for EAP state machine
38 * EAPOL_eapSuccess - EAP SUCCESS state reached
45 * EAPOL_eapRestart - Lower layer request to restart authentication
52 * EAPOL_eapFail - EAP FAILURE state reached
59 * EAPOL_eapResp - Response to send
66 * EAPOL_eapNoResp - Request has been process; no response to send
73 * EAPOL_eapReq - EAP request available from lower layer
80 * EAPOL_portEnabled - Lower layer is ready for communication
87 * EAPOL_altAccept - Alternate indication of success (RFC3748)
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H A Deap_tls_common.c2 * EAP peer: EAP-TLS/PEAP/TTLS/FAST common functions
3 * Copyright (c) 2004-2019, Jouni Malinen <j@w1.fi>
47 return -1; in eap_tls_check_blob()
51 *data = blob->data; in eap_tls_check_blob()
52 *data_len = blob->len; in eap_tls_check_blob()
64 params->flags |= TLS_CONN_ALLOW_SIGN_RSA_MD5; in eap_tls_params_flags()
66 params->flags |= TLS_CONN_DISABLE_TIME_CHECKS; in eap_tls_params_flags()
68 params->flags |= TLS_CONN_DISABLE_SESSION_TICKET; in eap_tls_params_flags()
70 params->flags &= ~TLS_CONN_DISABLE_SESSION_TICKET; in eap_tls_params_flags()
72 params->flag in eap_tls_params_flags()
1186 eap_peer_tls_phase2_nak(struct eap_method_type * types,size_t num_types,struct eap_hdr * hdr,struct wpabuf ** resp) eap_peer_tls_phase2_nak() argument
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/freebsd-src/sys/dev/safe/
H A Dsafereg.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
33 * Register definitions for SafeNet SafeXcel-1141 crypto device.
47 #define SAFE_PE_SRC 0x0004 /* Packet Engine Source */
48 #define SAFE_PE_DST 0x0008 /* Packet Engine Destination */
49 #define SAFE_PE_SA 0x000c /* Packet Engine SA */
50 #define SAFE_PE_LEN 0x0010 /* Packet Engine Length */
51 #define SAFE_PE_DMACFG 0x0040 /* Packet Engine DMA Configuration */
52 #define SAFE_PE_DMASTAT 0x0044 /* Packet Engine DMA Status */
53 #define SAFE_PE_PDRBASE 0x0048 /* Packet Engine Descriptor Ring Base */
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/freebsd-src/sys/contrib/ncsw/inc/Peripherals/
H A Dfm_pcd_ext.h1 /* Copyright (c) 2008-2012 Freescale Semiconductor, Inc
60 @Description Frame Manager PCD (Parse-Classify-Distribute) API.
70 module will manage the PCD resources - i.e. resource management of
82 #define FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS (32 - FM_PCD_MAX_NUM_OF_PRIVATE_HDRS)
98 …MAGE_SIZE (FM_PCD_SW_PRS_SIZE /*- FM_PCD_PRS_SW_OFFSET -FM_PCD_PRS_SW_TAIL_SIZE…
123 …e_FM_PCD_PLCR_COUNTERS_RED, /**< Policer counter - counts the tota…
124 …e_FM_PCD_PLCR_COUNTERS_YELLOW, /**< Policer counter - counts the tota…
125 …e_FM_PCD_PLCR_COUNTERS_RECOLORED_TO_RED, /**< Policer counter - counts the numb…
127 …e_FM_PCD_PLCR_COUNTERS_RECOLORED_TO_YELLOW, /**< Policer counter - counts the numb…
129 …e_FM_PCD_PLCR_COUNTERS_TOTAL, /**< Policer counter - counts the tota…
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/freebsd-src/crypto/openssl/apps/
H A Dcmp.c2 * Copyright 2007-2023 The OpenSSL Project Authors. All Rights Reserved.
3 * Copyright Nokia 2007-2019
4 * Copyright Siemens AG 2015-2019
58 static OSSL_CMP_CTX *cmp_ctx = NULL; /* the client-side CMP context */
79 static int opt_msg_timeout = -1;
80 static int opt_total_timeout = -1;
106 static int opt_cmd = -1;
123 static int opt_popo = OSSL_CRMF_POPO_NONE - 1;
154 /* client-side debugging */
267 {"help", OPT_HELP, '-', "Display this summary"},
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/freebsd-src/sys/dev/cxgbe/firmware/
H A Dt6fw_cfg.txt82 # Enable iscsi hdr cmd mode.
86 #mc_mode_brc[0] = 1 # mc0 - 1: enable BRC, 0: enable RBC
88 # PFs 0-3. These get 8 MSI/8 MSI-X vectors each. VFs are supported by
138 # PF4 is the resource-rich PF that the bus/nexus driver attaches to.
139 # It gets 32 MSI/128 MSI-X vectors.
175 # PF5 is the SCSI Controller PF. It gets 32 MSI/40 MSI-X vectors.
181 # PF6 is the FCoE Controller PF. It gets 32 MSI/40 MSI-X vectors.
204 # Scatter Gather Engine (SGE) hardware which checks writes to VF KDOORBELL
H A Dt6fw_cfg_fpga.txt3 # Copyright (C) 2014-2015 Chelsio Communications. All rights reserved.
6 # WILL RESULT IN A NON-FUNCTIONAL ADAPTER AND MAY RESULT IN PHYSICAL DAMAGE
10 # This file provides the default, power-on configuration for 2-port T6-based
25 # 4. MSI-X Vectors: 1088.
26 # 5. Multi-Port Support (MPS) TCAM: 336 entries to support MAC destination
34 # functions for ports 0-1 on PF0-1, FCoE on PF4, iSCSI on PF5, etc.
39 # Ingress Queues and MSI-X Vectors to allow up to some number of CPUs
47 # 16 Ingress Queue/MSI-X Vectors per application function
49 # for a total of 96 Ingress Queues and MSI-X Vectors on the Unified PF.
52 # 9. Some customers will want to use PCI-E SR-IOV Capability to allow Virtual
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/freebsd-src/sys/dev/ocs_fc/
H A Dsli4.h1 /*-
34 * Define common SLI-4 structures and function prototypes.
43 #define SLI_SUB_PAGE_MASK (SLI_PAGE_SIZE - 1)
53 uint32_t mask = page_size - 1; in sli_page_count()
93 * Common SLI-4 register offsets and field definitions
97 * @brief SLI_INTF - SLI Interface Definition Register
119 * @brief ASIC_ID - SLI ASIC Type and Revision Register
135 * @brief BMBX - Bootstrap Mailbox Register
150 * @brief EQCQ_DOORBELL - EQ and CQ Doorbell Register
168 * @brief SLIPORT_CONTROL - SLI Port Control Register
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/freebsd-src/sys/dev/ae/
H A Dif_ae.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
91 { -1, 0, 0 }
95 { -1, 0, 0 }
99 { -1, 0, 0 }
189 bus_read_4((sc)->mem[0], (reg))
191 bus_read_2((sc)->me
1434 ae_txd_t *hdr; ae_encap() local
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/freebsd-src/sys/dev/cxgbe/crypto/
H A Dt6_kern_tls.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2018-2019 Chelsio Communications, Inc.
120 struct port_info *pi = vi->pi; in alloc_tlspcb()
121 struct adapter *sc = pi->adapter; in alloc_tlspcb()
128 m_snd_tag_init(&tlsp->com, ifp, &t6_tls_tag_sw); in alloc_tlspcb()
129 tlsp->v in alloc_tlspcb()
660 struct tls_record_layer *hdr; ktls_tcp_payload_length() local
711 struct tls_record_layer *hdr; ktls_payload_offset() local
759 struct tls_record_layer *hdr; ktls_wr_len() local
1324 struct tls_record_layer *hdr; ktls_write_tls_wr() local
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/freebsd-src/sys/dev/qat_c2xxx/
H A Dqat_hw15.c1 /* SPDX-License-Identifier: BSD-2-Clause AND BSD-3-Clause */
31 * Copyright(c) 2007-2013 Intel Corporation. All rights reserved.
102 msg->flags = ARCH_IF_FLAGS_VALID_FLAG | in qat_msg_req_type_populate()
104 msg->req_type = type; in qat_msg_req_type_populate()
105 msg->resp_pipe_id = rxring; in qat_msg_req_type_populate()
112 struct fw_comn_req_hdr *hdr = &msg->comn_hdr; in qat_msg_cmn_hdr_populate() local
114 hdr->comn_req_flags = comn_req_flags; in qat_msg_cmn_hdr_populate()
115 hdr->content_desc_params_sz = hwblksz; in qat_msg_cmn_hdr_populate()
116 hdr->content_desc_hdr_sz = hdrsz; in qat_msg_cmn_hdr_populate()
117 hdr->content_desc_addr = desc_paddr; in qat_msg_cmn_hdr_populate()
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/freebsd-src/sys/dev/qlnx/qlnxe/
H A Decore_hsi_debug_tools.h2 * Copyright (c) 2017-2018 Cavium, Inc.
258 * Attention block per-type data
274 …struct dbg_attn_block_type_data per_type_data[2] /* attention block per-type data. Count must matc…
287 …ntions within the blocks attentions list (a value in the range 0..number of block attentions-1) */;
326 …ntions within the blocks attentions list (a value in the range 0..number of block attentions-1) */;
372 #define DBG_BUS_LINE_NUM_OF_GROUPS_MASK 0xF /* Number of groups in the line (0-3) */
378 …u8 group_sizes /* Four 2-bit values, indicating the size of each group minus 1 (i.e. value=0 means…
404 #define DBG_DUMP_MEM_WIDE_BUS_MASK 0x1 /* indicates if the register is wide-bus */
418 #define DBG_DUMP_REG_WIDE_BUS_MASK 0x1 /* indicates if the register is wide-bus */
429 u32 hdr; member
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