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/freebsd-src/sys/contrib/device-tree/Bindings/pinctrl/
H A Dmarvell,kirkwood-pinctrl.txt3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,88f6180-pinctrl",
8 "marvell,88f6190-pinctrl", "marvell,88f6192-pinctrl",
9 "marvell,88f6281-pinctrl", "marvell,88f6282-pinctrl",
10 "marvell,98dx4122-pinctrl", "marvell,98dx1135-pinctrl"
11 - reg: register specifier of MPP registers
14 It also support the 88f6281-based variant in the 98dx412x Bobcat SoCs.
24 mpp0 0 gpio, nand(io2), spi(cs)
26 mpp2 2 gpo, nand(io4), spi(sck)
28 mpp4 4 gpio, nand(io6), uart0(rxd), ptp(clk)
[all …]
H A Dmarvell,armada-39x-pinctrl.txt3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,88f6920-pinctrl", "marvell,88f6925-pinctrl" or
8 "marvell,88f6928-pinctrl" depending on the specific variant of the
10 - reg: register specifier of MPP registers
18 mpp0 0 gpio, ua0(rxd)
19 mpp1 1 gpio, ua0(txd)
20 mpp2 2 gpio, i2c0(sck)
21 mpp3 3 gpio, i2c0(sda)
22 mpp4 4 gpio, ua1(txd), ua0(rts), smi(mdc)
23 mpp5 5 gpio, ua1(rxd), ua0(cts), smi(mdio)
[all …]
H A Dmarvell,armada-370-pinctrl.txt3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,88f6710-pinctrl"
8 - reg: register specifier of MPP registers
16 mpp0 0 gpio, uart0(rxd)
18 mpp2 2 gpio, i2c0(sck), uart0(txd)
19 mpp3 3 gpio, i2c0(sda), uart0(rxd)
20 mpp4 4 gpio, vdd(cpu-pd)
21 mpp5 5 gpo, ge0(txclkout), uart1(txd), spi1(sck), audio(mclk)
22 mpp6 6 gpio, ge0(txd0), sata0(prsnt), tdm(rst), audio(sdo)
24 mpp8 8 gpio, ge0(txd2), uart0(rts), tdm(drx), audio(bclk)
[all …]
H A Dmarvell,armada-38x-pinctrl.txt3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,88f6810-pinctrl", "marvell,88f6820-pinctrl" or
8 "marvell,88f6828-pinctrl" depending on the specific variant of the
10 - reg: register specifier of MPP registers
18 mpp0 0 gpio, ua0(rxd)
19 mpp1 1 gpio, ua0(txd)
20 mpp2 2 gpio, i2c0(sck)
21 mpp3 3 gpio, i2c0(sda)
22 mpp4 4 gpio, ge(mdc), ua1(txd), ua0(rts)
23 mpp5 5 gpio, ge(mdio), ua1(rxd), ua0(cts)
[all …]
H A Dmarvell,armada-375-pinctrl.txt3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,88f6720-pinctrl"
8 - reg: register specifier of MPP registers
16 mpp0 0 gpio, dev(ad2), spi0(cs1), spi1(cs1)
17 mpp1 1 gpio, dev(ad3), spi0(mosi), spi1(mosi)
18 mpp2 2 gpio, dev(ad4), ptp(evreq), led(c0), audio(sdi)
19 mpp3 3 gpio, dev(ad5), ptp(trig), led(p3), audio(mclk)
20 mpp4 4 gpio, dev(ad6), spi0(miso), spi1(miso)
21 mpp5 5 gpio, dev(ad7), spi0(cs2), spi1(cs2)
22 mpp6 6 gpio, dev(ad0), led(p1), audio(lrclk)
[all …]
H A Dmarvell,dove-pinctrl.txt3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,dove-pinctrl"
8 - clocks: (optional) phandle of pdma clock
9 - reg: register specifiers of MPP, MPP4, and PMU MPP registers
18 mpp0 0 gpio, pmu, uart2(rts), sdio0(cd), lcd0(pwm), pmu*
19 mpp1 1 gpio, pmu, uart2(cts), sdio0(wp), lcd1(pwm), pmu*
20 mpp2 2 gpio, pmu, uart2(txd), sdio0(buspwr), sata(prsnt),
22 mpp3 3 gpio, pmu, uart2(rxd), sdio0(ledctrl), sata(act),
23 uart1(cts), lcd-spi(cs1), pmu*
24 mpp4 4 gpio, pmu, uart3(rts), sdio1(cd), spi1(miso), pmu*
[all …]
H A Dmarvell,armada-98dx3236-pinctrl.txt3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,98dx3236-pinctrl" or "marvell,98dx4251-pinctrl"
8 - reg: register specifier of MPP registers
15 mpp1 1 gpio, spi0(miso), dev(ad9)
16 mpp2 2 gpo, spi0(sck), dev(ad10)
17 mpp3 3 gpio, spi0(cs0), dev(ad11)
18 mpp4 4 gpio, spi0(cs1), smi(mdc), dev(cs0)
19 mpp5 5 gpio, pex(rsto), sd0(cmd), dev(bootcs)
21 mpp7 7 gpio, sd0(d0), dev(ale0)
22 mpp8 8 gpio, sd0(d1), dev(ale1)
[all …]
H A Dmarvell,armada-xp-pinctrl.txt3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,mv78230-pinctrl", "marvell,mv78260-pinctrl",
8 "marvell,mv78460-pinctrl"
9 - reg: register specifier of MPP registers
21 mpp0 0 gpio, ge0(txclkout), lcd(d0)
22 mpp1 1 gpio, ge0(txd0), lcd(d1)
23 mpp2 2 gpio, ge0(txd1), lcd(d2)
24 mpp3 3 gpio, ge0(txd2), lcd(d3)
25 mpp4 4 gpio, ge0(txd3), lcd(d4)
26 mpp5 5 gpio, ge0(txctl), lcd(d5)
[all …]
/freebsd-src/sys/contrib/device-tree/Bindings/spi/
H A Dspi-gpio.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SPI-GPIO
10 - Rob Herring <robh@kernel.org>
13 This represents a group of 3-n GPIO lines used for bit-banged SPI on
14 dedicated GPIO lines.
17 - $ref: /schemas/spi/spi-controller.yaml#
21 const: spi-gpio
[all …]
/freebsd-src/sys/contrib/device-tree/Bindings/iio/adc/
H A Davia-hx711.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/avia-hx711.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andreas Klinger <ak@it-klinger.de>
13 Bit-banging driver using two GPIOs:
14 - sck-gpio gives a clock to the sensor with 24 cycles for data retrieval
17 - dout-gpio is the sensor data the sensor responds to the clock
25 - avia,hx711
27 sck-gpios:
[all …]
/freebsd-src/sys/contrib/device-tree/Bindings/arm/marvell/
H A Dcp110-system-controller.txt6 giving access to numerous features: clocks, pin-muxing and many other
11 - compatible: must be: "syscon", "simple-mfd";
12 - reg: register area of the CP110 system controller
18 -------
23 - a set of core clocks
24 - a set of gateable clocks
28 - The first cell must be 0 or 1. 0 for the core clocks and 1 for the
30 - The second cell identifies the particular core clock or gateable
34 - Core clocks
35 - 0 0 APLL
[all …]
/freebsd-src/sys/contrib/device-tree/src/arm/microchip/
H A Dlan966x-kontron-kswitch-d10-mmt.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "dt-bindings/phy/phy-lan966x-serdes.h"
16 stdout-path = "serial0:115200n8";
19 gpio-restart {
20 compatible = "gpio-restart";
21 pinctrl-0 = <&reset_pins>;
22 pinctrl-names = "default";
23 gpios = <&gpio 56 GPIO_ACTIVE_LOW>;
29 atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
[all …]
H A Dat91-tse850-3.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91-tse850-3.dts - Device Tree file for the Axentia TSE-850 3.0 board
9 /dts-v1/;
10 #include <dt-bindings/pwm/pwm.h>
11 #include "at91-linea.dtsi"
14 model = "Axentia TSE-850 3.0";
18 sck: oscillator { label
19 compatible = "fixed-clock";
21 #clock-cells = <0>;
22 clock-frequency = <16000000>;
[all …]
/freebsd-src/sys/contrib/device-tree/Bindings/fpga/
H A Dlattice-ice40-fpga-mgr.txt4 - compatible: Should contain "lattice,ice40-fpga-mgr"
5 - reg: SPI chip select
6 - spi-max-frequency: Maximum SPI frequency (>=1000000, <=25000000)
7 - cdone-gpios: GPIO input connected to CDONE pin
8 - reset-gpios: Active-low GPIO output connected to CRESET_B pin. Note
9 that unless the GPIO is held low during startup, the
10 FPGA will enter Master SPI mode and drive SCK with a
16 compatible = "lattice,ice40-fpga-mgr";
18 spi-max-frequency = <1000000>;
19 cdone-gpios = <&gpio 24 GPIO_ACTIVE_HIGH>;
[all …]
/freebsd-src/sys/contrib/device-tree/src/arm/nxp/vf/
H A Dvf610-bk4.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
15 stdout-path = &uart1;
23 audio_ext: oscillator-audio {
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
26 clock-frequency = <24576000>;
29 enet_ext: oscillator-ethernet {
30 compatible = "fixed-clock";
31 #clock-cells = <0>;
[all …]
/freebsd-src/sys/contrib/device-tree/src/arm/st/
H A Dste-nomadik-nhk15.dts1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include "ste-nomadik-stn8815.dtsi"
13 compatible = "st,nomadik-nhk-15";
22 stmpe-i2c0 = &stmpe0;
23 stmpe-i2c1 = &stmpe1;
71 disable-sxtalo;
72 disable-mxtalo;
[all …]
/freebsd-src/sys/contrib/device-tree/src/arm64/amlogic/
H A Dmeson-gxl-s905x-khadas-vim.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "meson-gxl-s905x-p212.dtsi"
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/sound/meson-ai
[all...]
H A Dmeson-gxbb-odroidc2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include "meson-gxbb.dtsi"
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/sound/meson-ai
[all...]
/freebsd-src/sys/contrib/device-tree/Bindings/display/panel/
H A Dsamsung,lms397kf04.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schema
[all...]
H A Dsamsung,s6d27a1.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schema
[all...]
H A Dsamsung,lms380kf01.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schema
[all...]
/freebsd-src/sys/contrib/device-tree/src/arm/broadcom/
H A Dbcm947189acdbmr.dts8 /dts-v1/;
26 compatible = "gpio-leds";
28 led-wps {
33 led-5ghz {
38 led-2ghz {
44 gpio-keys {
45 compatible = "gpio-keys";
47 button-restart {
53 button-wps {
61 compatible = "spi-gpio";
[all …]
H A Dbcm47081-buffalo-wzr-900dhp.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
4 * DTS for Buffalo WZR-900DHP
9 /dts-v1/;
12 #include "bcm5301x-nand-cs0-bch8.dtsi"
15 compatible = "buffalo,wzr-900dhp", "brcm,bcm47081", "brcm,bcm4708";
16 model = "Buffalo WZR-900DHP (BCM47081)";
29 compatible = "spi-gpio";
30 num-chipselects = <1>;
31 sck-gpios = <&chipcommon 7 0>;
32 mosi-gpios = <&chipcommon 4 0>;
[all …]
/freebsd-src/sys/contrib/device-tree/src/arm/aspeed/
H A Dast2600-facebook-netbmc-common.dtsi1 // SPDX-License-Identifier: GPL-2.0+
4 #include "aspeed-g6.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
24 * GPIO-based SPI Master is required to access SPI TPM, because
25 * full-duplex SPI transactions are not supported by ASPEED SPI
30 compatible = "spi-gpio";
31 #address-cells = <1>;
32 #size-cells = <0>;
34 gpio-sck = <&gpio0 ASPEED_GPIO(X, 3) GPIO_ACTIVE_HIGH>;
35 gpio-mosi = <&gpio0 ASPEED_GPIO(X, 4) GPIO_ACTIVE_HIGH>;
[all …]
/freebsd-src/sys/contrib/device-tree/src/arm/nxp/mxs/
H A Dimx28-cfa10049.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * The CFA-10049 is an expansion board for the CFA-10036 module, thus we
8 * need to include the CFA-10036 DTS.
10 #include "imx28-cfa10036.dts"
13 model = "Crystalfontz CFA-10049 Board";
17 compatible = "i2c-mux-gpio";
18 #address-cells = <1>;
19 #size-cells = <0>;
20 pinctrl-names = "default";
21 pinctrl-0 = <&i2cmux_pins_cfa10049>;
[all …]

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