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Searched full:genpll (Results 1 – 14 of 14) sorted by relevance

/freebsd-src/sys/contrib/device-tree/Bindings/clock/
H A Dbrcm,iproc-clocks.yaml15 An SoC from the iProc family may have several PLLs, e.g., ARMPLL, GENPLL,
27 - brcm,cygnus-genpll
34 - brcm,nsp-genpll
36 - brcm,ns2-genpll-scr
37 - brcm,ns2-genpll-sw
94 - brcm,cygnus-genpll
117 genpll crystal 0 BCM_CYGNUS_GENPLL
118 axi21 genpll 1 BCM_CYGNUS_GENPLL_AXI21_CLK
119 250mhz genpll 2 BCM_CYGNUS_GENPLL_250MHZ_CLK
120 ihost_sys genpll 3 BCM_CYGNUS_GENPLL_IHOST_SYS_CLK
[all …]
H A Dbrcm,iproc-clocks.txt7 An SoC from the iProc family may have several PPLs, e.g., ARMPLL, GENPLL,
14 Should have a value of the form "brcm,<soc>-<pll>". For example, GENPLL on
15 Cygnus has a compatible string of "brcm,cygnus-genpll"
39 genpll: genpll {
41 compatible = "brcm,cygnus-genpll";
44 clock-output-names = "genpll", "axi21", "250mhz", "ihost_sys",
91 "brcm,cygnus-genpll"
111 genpll crystal 0 BCM_CYGNUS_GENPLL
112 axi21 genpll 1 BCM_CYGNUS_GENPLL_AXI21_CLK
113 250mhz genpll 2 BCM_CYGNUS_GENPLL_250MHZ_CLK
[all …]
/freebsd-src/sys/contrib/device-tree/include/dt-bindings/clock/
H A Dbcm-sr.h36 /* GENPLL 0 clock channel ID SCR HSLS FS PCIE */
45 /* GENPLL 1 clock channel ID MHB PCIE NITRO */
50 /* GENPLL 2 clock channel ID NITRO MHB*/
59 /* GENPLL 3 HSLS clock channel ID */
64 /* GENPLL 4 SCR clock channel ID */
72 /* GENPLL 5 FS4 clock channel ID */
78 /* GENPLL 6 NITRO clock channel ID */
99 /* GENPLL EMEM0 clock channel ID */
103 /* GENPLL EMEM0 clock channel ID */
107 /* GENPLL EMEM0 clock channel ID */
H A Dbcm-ns2.h36 /* GENPLL SCR clock channel ID */
45 /* GENPLL SW clock channel ID */
H A Dbcm-nsp.h36 /* GENPLL clock channel ID */
H A Dbcm-cygnus.h36 /* GENPLL clock ID */
/freebsd-src/sys/contrib/device-tree/src/arm/broadcom/
H A Dbcm-cygnus-clock.dtsi70 genpll: genpll@301d000 { label
72 compatible = "brcm,cygnus-genpll";
75 clock-output-names = "genpll", "axi21", "250mhz", "ihost_sys",
83 clocks = <&genpll 1>;
92 clocks = <&genpll 1>;
H A Dbcm5301x.dtsi43 clocks = <&genpll BCM_NSP_GENPLL_IPROCFAST_CLK>;
51 clocks = <&genpll BCM_NSP_GENPLL_IPROCFAST_CLK>;
86 genpll: clock-controller@140 { label
88 compatible = "brcm,nsp-genpll";
91 clock-output-names = "genpll", "phy",
H A Dbcm-nsp.dtsi147 clocks = <&genpll BCM_NSP_GENPLL_IPROCFAST_CLK>;
155 clocks = <&genpll BCM_NSP_GENPLL_IPROCFAST_CLK>;
496 genpll: genpll@3f140 { label
498 compatible = "brcm,nsp-genpll";
501 clock-output-names = "genpll", "phy", "ethernetclk",
H A Dbcm-ns.dtsi436 clocks = <&genpll BCM_NSP_GENPLL_USB_PHY_REF_CLK>;
/freebsd-src/sys/contrib/device-tree/Bindings/mfd/
H A Dbrcm,cru.yaml76 compatible = "brcm,nsp-genpll";
79 clock-output-names = "genpll", "phy", "ethernetclk", "usbclk",
87 clocks = <&genpll BCM_NSP_GENPLL_USB_PHY_REF_CLK>;
/freebsd-src/sys/contrib/device-tree/src/arm64/broadcom/northstar2/
H A Dns2-clock.dtsi70 compatible = "brcm,ns2-genpll-scr";
98 compatible = "brcm,ns2-genpll-sw";
/freebsd-src/sys/contrib/device-tree/Bindings/phy/
H A Dbcm-ns-usb2-phy.txt19 clocks = <&genpll BCM_NSP_GENPLL_USB_PHY_REF_CLK>;
H A Dbcm-ns-usb2-phy.yaml69 clocks = <&genpll BCM_NSP_GENPLL_USB_PHY_REF_CLK>;