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/freebsd-src/sys/contrib/device-tree/Bindings/fpga/
H A Dfpga-region.txt1 FPGA Region Device Tree Binding
6 - Introduction
7 - Terminology
8 - Sequence
9 - FPGA Region
10 - Supported Use Models
11 - Device Tree Examples
12 - Constraints
18 FPGA Regions represent FPGA's and partial reconfiguration regions of FPGA's in
19 the Device Tree. FPGA Regions provide a way to program FPGAs under device tree
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H A Dxilinx-pr-decoupler.txt4 decouplers / fpga bridges.
5 The controller can decouple/disable the bridges which prevents signal
7 couple / enable the bridges which allows traffic to pass through the
11 Softcore is compatible with the Xilinx LogiCORE pr-decoupler.
15 and AXI4-Lite interfaces on a Reconfigurable Partition when it is
24 - compatible : Should contain "xlnx,pr-decoupler-1.00" followed by
25 "xlnx,pr-decoupler" or
26 "xlnx,dfx-axi-shutdown-manager-1.00" followed by
27 "xlnx,dfx-axi-shutdown-manager"
28 - regs : base address and size for decoupler module
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H A Dxlnx,pr-decoupler.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/fpga/xlnx,pr-decoupler.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Nava kishore Manne <nava.kishore.manne@amd.com>
13 - $ref: fpga-bridge.yaml#
17 decouplers/fpga bridges. The controller can decouple/disable the bridges
19 can also couple / enable the bridges which allows traffic to pass through the
22 is compatible with the Xilinx LogiCORE pr-decoupler. The Dynamic Function
24 bridge. The controller safely handles AXI4MM and AXI4-Lite interfaces on a
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H A Daltr,freeze-bridge-controller.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/fpga/altr,freeze-bridge-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The Altera Freeze Bridge Controller manages one or more freeze bridges.
11 The controller can freeze/disable the bridges which prevents signal
13 unfreeze/enable the bridges which allows traffic to pass through the bridge
17 - Xu Yilun <yilun.xu@intel.com>
20 - $ref: fpga-bridge.yaml#
24 const: altr,freeze-bridge-controller
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H A Daltera-freeze-bridge.txt3 The Altera Freeze Bridge Controller manages one or more freeze bridges.
4 The controller can freeze/disable the bridges which prevents signal
6 unfreeze/enable the bridges which allows traffic to pass through the
10 - compatible : Should contain "altr,freeze-bridge-controller"
11 - regs : base address and size for freeze bridge module
13 See Documentation/devicetree/bindings/fpga/fpga-bridge.txt for generic bindings.
16 freeze-controller@100000450 {
17 compatible = "altr,freeze-bridge-controller";
19 bridge-enable = <0>;