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/freebsd-src/sys/contrib/device-tree/Bindings/spi/
H A Dcdns,qspi-nor.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/cdns,qspi-nor.yaml#
5 $schema: http://devicetree.org/meta-schema
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H A Dcadence-quadspi.txt4 - compatible : should be one of the following:
5 Generic default - "cdns,qspi-nor".
6 For TI 66AK2G SoC - "ti,k2g-qspi", "cdns,qspi-nor".
7 For TI AM654 SoC - "ti,am654-ospi", "cdns,qspi-nor".
8 For Intel LGM SoC - "intel,lgm-qspi", "cdns,qspi-nor".
9 - reg : Contains two entries, each of which is a tuple consisting of a
13 - interrupts : Unit interrupt specifier for the controller interrupt.
14 - clocks : phandle to the Quad SPI clock.
15 - cdns,fifo-depth : Size of the data FIFO in words.
16 - cdns,fifo-width : Bus width of the data FIFO in bytes.
[all …]
/freebsd-src/sys/contrib/device-tree/Bindings/mtd/
H A Dcadence-quadspi.txt4 - compatible : should be one of the following:
5 Generic default - "cdns,qspi-nor".
6 For TI 66AK2G SoC - "ti,k2g-qspi", "cdns,qspi-nor".
7 For TI AM654 SoC - "ti,am654-ospi", "cdns,qspi-nor".
8 - reg : Contains two entries, each of which is a tuple consisting of a
12 - interrupts : Unit interrupt specifier for the controller interrupt.
13 - clocks : phandle to the Quad SPI clock.
14 - cdns,fifo-depth : Size of the data FIFO in words.
15 - cdns,fifo-width : Bus width of the data FIFO in bytes.
16 - cdns,trigger-address : 32-bit indirect AHB trigger address.
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/freebsd-src/lib/libsys/
H A Dmkfifo.234 .Nd make a fifo file
48 creates a new fifo file with name
57 The fifo's owner ID is set to the process's effective user ID.
58 The fifo's group ID is set to that of the parent directory in
68 In this case the newly created FIFO is created relative to the
82 .Rv -std mkfifo
87 will fail and no fifo will be created if:
88 .Bl -tag -width Er
90 The kernel has not been configured to support fifo's.
100 is denied on the parent directory of the fifo to be created.
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H A Dstat.296 are constructed by a bitwise-inclusive OR of flags from this list,
99 .Bl -tag -width indent
160 .Bl -tag -width ".Va st_nlink"
180 The time-related fields of
183 .Bl -tag -width ".Va st_birthtim"
237 These time-related macros are defined for compatibility:
238 .Bd -literal
254 Size-related fields of the
257 .Bl -tag -width ".Va st_blksize"
263 Actual number of blocks allocated for the file in 512-byte units.
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/freebsd-src/sys/dev/ichiic/
H A Dig4_reg.h40 …ntel.com/content/dam/www/public/us/en/documents/datasheets/4th-gen-core-family-mobile-i-o-datashee…
42 * This is a from-scratch driver under the BSD license using the Intel data
61 * Register width is 32-bits
87 #define IG4_REG_RX_TL 0x0038 /* RW Receive FIFO Threshold */
88 #define IG4_REG_TX_TL 0x003C /* RW Transmit FIFO Threshold */
102 #define IG4_REG_TXFLR 0x0074 /* RO Transmit FIFO Level */
103 #define IG4_REG_RXFLR 0x0078 /* RO Receive FIFO Level */
117 #define IG4_REG_COMP_TYPE 0x00FC /* RO Probe width/endian? (linux) */
118 /* 0x200-0x2FF - Additional registers available on Skylake-U/Y and others */
135 * CTL - Control Register 22.2.1
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/freebsd-src/share/man/man4/
H A Duftdi.441 .Bd -ragged -offset indent
50 .Bd -literal -offset indent
59 .Bl -bullet -compact
93 .Bl -tag -width indent
97 Flush the RX FIFO.
99 Flush the TX FIFO.
116 .Bd -literal
156 the point of an error such as FIFO overflow.
158 Set the character which causes a partial FIFO full of data
159 to be returned immediately even if the FIFO is not full.
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H A Dng_pipe.42 .\" Copyright (c) 2004-2008 University of Zagreb
3 .\" Copyright (c) 2007-2008 FreeBSD Foundation
42 .Bl -tag -width ".Va upper"
64 Data received on a hook - both in upstream and downstream direction -
71 .Bl -tag -width foo
72 .It Dv "First In First Out (FIFO)"
107 .Bl -tag -width foo
112 Note: To set a value to zero, specify -1 instead.
118 .Bd -literal
135 u_int32_t fifo; /* 0 = off, 1 = on */
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H A Duart.41 .\"-
2 .\" SPDX-License-Identifier: BSD-2-Clause
53 .Bl -tag -compact -width 0x000000
59 set RX FIFO trigge
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H A Dfdc.454 either FM (single-density) or MFM (double or high-density) recording
69 These enhanced controllers (among other enhancements) implement a FIFO
72 This FIFO activation can be disabled
73 using the per-controller flags value of
80 For historical reasons, device nodes that use a trailing UFS-style
89 of the available medium for multi-density devices.
92 high-density 3.5 inch standard floppy drive.
101 this can be overridden using the per-drive device flags value of
107 When trying to use a floppy device with special-density media, other
130 Drive types are configured using the lower four bits of the per-drive
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H A Dvge.415 .\" 4. Neither the name of the author nor the names of any co-contributors
41 .Bd -ragged -offset indent
49 .Bd -literal -offset indent
59 The VT6120/VT6122 is a 33/66MHz 64-bit PCI device which combines a tri-speed
65 as well as VLAN filtering, a 64-entry CAM filter and a 64-entry VLAN filter,
66 64-bit multicast hash filter, 4 separate transmit DMA queues, flow control
68 The Velocity family controllers have a 16K receive FIFO and 48K transmit FIFO.
93 .Bl -tag -width ".Cm 10baseT/UTP"
105 .Cm full-duplex
107 .Cm half-duplex
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/freebsd-src/sys/contrib/device-tree/src/mips/realtek/
H A Drtl83xx.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause
4 #address-cells = <1>;
5 #size-cells = <1>;
13 compatible = "mti,cpu-interrup
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/freebsd-src/sys/contrib/device-tree/src/arm64/intel/
H A Dsocfpga_agilex.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
7 #include <dt-bindings/reset/altr,rst-mgr-s10.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controlle
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/freebsd-src/sys/contrib/device-tree/src/arm64/altera/
H A Dsocfpga_stratix10.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
7 #include <dt-bindings/reset/altr,rst-mgr-s10.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-binding
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/freebsd-src/usr.sbin/nscd/
H A Dnscd.conf.562 (for example, if some third-party
64 .Bl -tag -width indent
69 .It Va enable-cache Oo Ar cachename Oc Op Cm yes | no
72 .It Va positive-time-to-live Oo Ar cachename Oc Op Ar value
73 Sets the TTL (time-to-live) for the specified cache in seconds.
77 .It Va positive-policy Oo Ar cachename Oc Op Cm fifo | lru | lfu
83 .Cm fifo
84 (first-in-first-out),
86 (least-recently-used), and
88 (least-frequently-used).
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/freebsd-src/sys/contrib/device-tree/Bindings/dma/
H A Dst,stm32-dma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/st,stm32-dm
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H A Dadi,axi-dmac.txt1 Analog Devices AXI-DMAC DMA controller
4 - compatible: Must be "adi,axi-dmac-1.00.a".
5 - reg: Specification for the controllers memory mapped register map.
6 - interrupts: Specification for the controllers interrupt.
7 - clocks: Phandle and specifier to the controllers AXI interface clock
8 - #dma-cells: Must be 1.
10 Required sub-nodes:
11 - adi,channels: This sub-node must contain a sub-node for each DMA channel. For
12 the channel sub-nodes the following bindings apply. They must match the
15 Required properties for adi,channels sub-node:
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/freebsd-src/sys/contrib/device-tree/Bindings/c6x/
H A Demifa.txt2 -------------------------
9 - compatible: must be "ti,c64x+emifa", "simple-bus"
10 - reg: register area base and size
11 - #address-cells: must be 2 (chip-select + offset)
12 - #size-cells: must be 1
13 - ranges: mapping from EMIFA space to parent space
18 - ti,dscr-dev-enable: Device ID if EMIF is enabled/disabled from DSCR
20 - ti,emifa-burst-priority:
22 of the oldest command in the command FIFO. Setting this field to 255
23 disables this feature, thereby allowing old commands to stay in the FIFO
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/freebsd-src/sys/contrib/device-tree/src/powerpc/
H A Dac14xx.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
14 #address-cells = <1>;
15 #size-cells = <1>;
26 timebase-frequency = <40000000>; /* 40 MHz (csb/4) */
27 bus-frequency = <160000000>; /* 160 MHz csb bus */
28 clock-frequency = <400000000>; /* 400 MHz ppc core */
49 compatible = "cfi-flash";
51 #address-cells = <1>;
52 #size-cells = <1>;
53 bank-width = <2>;
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/freebsd-src/share/man/man9/
H A DVOP_CREATE.91 .\" -*- nroff -*-
37 .Nd create a file, socket, fifo, device, directory or symlink
51 These entry points create a new file, socket, fifo, device, directory or symlink
55 .Bl -tag -width target
82 .Bl -tag -width Er
/freebsd-src/sys/contrib/device-tree/Bindings/mmc/
H A Dzx-dw-mshc.txt7 by synopsys-dw-mshc.txt and the properties used by the ZTE specific
13 - "zte,zx296718-dw-mshc": for ZX SoCs
18 compatible = "zte,zx296718-dw-mshc";
21 fifo-depth = <32>;
22 data-addr = <0x200>;
23 fifo-watermark-aligned;
24 bus-width = <4>;
25 clock-frequency = <50000000>;
27 clock-names = "biu", "ciu";
28 max-frequency = <50000000>;
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/freebsd-src/sys/contrib/alpine-hal/eth/
H A Dal_hal_eth_mac_regs.h1 /*-
10 found at http://www.gnu.org/licenses/gpl-2.0.html
420 /* [0x4c] XGMII 32 to 64 data FIFO control */
424 /* [0x54] XGMII 64 to 32 data FIFO control */
428 /* [0x5c] SerDes TX FIFO control */
430 /* [0x60] SerDes TX FIFO status */
550 /* [0x4] TX ASYNC FIFO configuration */
552 /* [0x8] TX ASYNC FIFO configuration */
554 /* [0xc] TX ASYNC FIFO configuration */
556 /* [0x10] TX ASYNC FIFO configuration */
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/freebsd-src/sys/contrib/device-tree/src/arm/rockchip/
H A Drk3xxx.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/soc/rockchip,boot-mod
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/freebsd-src/usr.sbin/nmtree/
H A Dmtree.555 .Bl -tag -width Cm
76 If the first whitespace-delimited word has no
82 .It dot-dot
86 Options on dot-dot entries are always ignored.
88 If the first whitespace-delimited word has a
104 .Bl -tag -width Cm
107 It is followed on the same line by one or more whitespace-separated
120 or more whitespace-separated keyword definitions.
128 .Bl -tag -width Cm
159 160-1
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/freebsd-src/sys/contrib/device-tree/src/riscv/starfive/
H A Djh7110.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
8 #include <dt-bindings/clock/starfive,jh7110-crg.h>
9 #include <dt-bindings/power/starfive,jh7110-pmu.h>
10 #include <dt-bindings/reset/starfive,jh7110-cr
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