Searched +full:ext +full:- +full:phyclk (Results 1 – 1 of 1) sorted by relevance
10 - compatible : "st,stih407-dwmac"11 - st,syscon : Should be phandle/offset pair. The phandle to the syscon node which13 - st,gmac_en: this is to enable the gmac into a dedicated sysctl control15 - pinctrl-0: pin-control for all the MII mode supported.18 - resets : phandle pointing to the system reset controller with correct20 - st,ext-phyclk: valid only for RMII where PHY can generate 50MHz clock or22 - st,tx-retime-src: This specifies which clk is wired up to the mac for26 - sti-ethclk: this is the phy clock.27 - sti-clkconf: this is an extra sysconfig register, available in new SoCs,29 - st,gmac_en: to enable the GMAC, this only is present in some SoCs; e.g.[all …]