/freebsd-src/sys/contrib/device-tree/Bindings/net/ |
H A D | stm32-dwmac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/net/stm32-dwmac.yaml# 6 $schema: http://devicetree.org/meta-schema [all...] |
/freebsd-src/sys/contrib/device-tree/src/arm/st/ |
H A D | stm32mp157c-odyssey.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 6 /dts-v1/; 8 #include "stm32mp157c-odyssey-som.dtsi" 11 model = "Seeed Studio Odyssey-STM32MP157C Board"; 12 compatible = "seeed,stm32mp157c-odyssey", 13 "seeed,stm32mp157c-odyssey-som", "st,stm32mp157"; 21 stdout-path = "serial0:115200n8"; 26 pinctrl-names = "default", "sleep"; 27 pinctrl-0 = <&dcmi_pins_b>; 28 pinctrl-1 = <&dcmi_sleep_pins_b>; [all …]
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H A D | stm32mp157c-osd32mp1-red.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (C) Geanix ApS 2023 - All Rights Reserved 7 /dts-v1/; 11 #include "stm32mp15xx-osd32.dtsi" 12 #include "stm32mp15xxac-pinctrl.dtsi" 14 #include <dt-binding [all...] |
H A D | stm32mp157c-phycore-stm32mp15-som.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (C) 2022-2023 Steffen Trumtrar <kernel@pengutronix.de> 4 * Copyright (C) Phytec GmbH 2019-2020 - All Rights Reserved 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/leds/common.h> 13 #include <dt-bindings/leds/leds-pca9532.h> 14 #include <dt-bindings/mfd/st,stpmic1.h> [all …]
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H A D | stm32mp157c-emstamp-argon.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 9 #include "stm32mp15-pinctrl.dtsi" 10 #include "stm32mp15xxac-pinctrl.dtsi" 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/mfd/st,stpmic1.h> 23 stdout-path = "serial0:115200n8"; 31 reserved-memory { 32 #address-cells = <1>; 33 #size-cells = <1>; 37 compatible = "shared-dma-pool"; [all …]
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H A D | stm32mp15xc-lxa-tac.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) 3 * Copyright (C) 2020 STMicroelectronics - All Rights Reserved 9 #include "stm32mp15xx-osd32.dtsi" 10 #include "stm32mp15xxac-pinctr [all...] |
/freebsd-src/sys/contrib/device-tree/src/arm/mediatek/ |
H A D | mt7623.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (c) 2017-2018 MediaTek Inc. 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-binding 959 eth: ethernet@1b100000 { global() label [all...] |
H A D | mt2701.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/clock/mt2701-clk.h> 9 #include <dt-bindings/phy/phy.h> 10 #include <dt-bindings/power/mt2701-power.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/memory/mt2701-larb-port.h> 14 #include <dt-bindings/reset/mt2701-resets.h> 15 #include "mt2701-pinfunc.h" 18 #address-cells = <2>; [all …]
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H A D | mt7629.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/clock/mt7629-clk.h> 11 #include <dt-bindings/power/mt7622-power.h> 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/phy/phy.h> 14 #include <dt-bindings/reset/mt7629-resets.h> 18 interrupt-parent = <&sysirq>; 19 #address-cells = <1>; [all …]
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/freebsd-src/sys/contrib/device-tree/src/arm64/mediatek/ |
H A D | mt7986a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 7 #include <dt-bindings/interrupt-controller/irq.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/clock/mt7986-cl 550 eth: ethernet@15100000 { global() label [all...] |
H A D | mt7622.dtsi | 6 * SPDX-License-Identifier: (GPL-2.0 OR MIT) 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/clock/mt7622-cl 968 eth: ethernet@1b100000 { global() label [all...] |
H A D | mt2712e.dtsi | 5 * SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 #include <dt-bindings/clock/mt2712-clk.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/interrupt-controlle 729 eth: ethernet@1101c000 { global() label [all...] |
H A D | mt8516.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/clock/mt8516-clk.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-binding [all...] |
H A D | mt8365.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 10 #include <dt-bindings/clock/mediatek,mt8365-clk.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-binding [all...] |
H A D | mt8195.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 7 /dts-v1/; 8 #include <dt-bindings/clock/mt8195-clk.h> 9 #include <dt-bindings/gce/mt8195-gce.h> 10 #include <dt-binding 1258 eth: ethernet@11021000 { global() label [all...] |
/freebsd-src/sys/contrib/device-tree/src/arm64/ti/ |
H A D | k3-am65-iot2050-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) Siemens AG, 2018-2024 12 #include <dt-bindings/leds/common.h> 13 #include <dt-bindings/phy/phy.h> 14 #include <dt-bindings/net/ti-dp83867.h> 36 stdout-pat [all...] |
/freebsd-src/contrib/one-true-awk/testdir/ |
H A D | funstack.in | 2 %%% BibTeX-file{ 23 %%% (incompletely) 1970 -- 1979. 50 %%% covering 1958--1996 became too large (about 65 %%% Algorithms 1--492. For Algorithms 493--686, 72 %%% cross-referenced in both directions, so 75 %%% Corrigenda. Cross-referenced entries are 77 %%% that each is completely self-contained. 83 %%% ftp://netlib.bell-labs.com/netlib/toms. 88 %%% http://ciir.cs.umass.edu/cgi-bin/web_query_form/public/cacm2.1. 90 %%% The initial draft of entries for 1981 -- [all …]
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/freebsd-src/sys/dev/qlnx/qlnxe/ |
H A D | reg_addr.h | 2 * Copyright (c) 2017-2018 Cavium, Inc. 78 …- For ending "endless completion". 0 - When receiving a completion timeout while receiving a compl… 79 … DataWidth:0x4 // 0 - TXCPL sync fifo pop underflow 1 - TXR sync fifo pop underflow 2 - TXW hea… 80 …s:R DataWidth:0x6 // 0 - RX target read and config sync fifo push overflow 1 - RX header syn… 81 …ataWidth:0x14 // 4:0 - TXCPL sync fifo pop status 9:5 - TXR sync fifo pop status 14:10 - TXW hea… 88 …ffff<<0) // Vendor ID. PCI-SIG assigned Manufacturer Identifier. Note: The access attributes of … 90 …ce Identifier. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E… 116 … (0x1<<9) // Fast back-to-back transaction ena… 128 … (0x1<<23) // Fast back-to-back capable. Not ap… 145 …l has_io_bar=0. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E… [all …]
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