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/freebsd-src/sys/contrib/device-tree/Bindings/net/
H A Dethernet-phy.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/ethernet-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <andrew@lunn.ch>
11 - Floria
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/freebsd-src/sys/contrib/device-tree/src/arm64/freescale/
H A Dfsl-ls1028a-kontron-sl28-var4.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * Device Tree file for the Kontron SMARC-sAL28 board.
12 /dts-v1/;
13 #include "fsl-ls1028a-kontron-sl28.dts"
14 #include <dt-bindings/net/qca-ar803x.h>
17 model = "Kontron SMARC-sAL28 (Dual PHY)";
18 compatible = "kontron,sl28-var4", "kontron,sl28", "fsl,ls1028a";
22 phy1: ethernet-phy@4 {
24 eee-broken-1000t;
25 eee-broken-100tx;
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H A Dfsl-ls1028a-kontron-sl28-var1.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * Device Tree file for the Kontron SMARC-sAL28 board.
15 /dts-v1/;
16 #include "fsl-ls1028a-kontron-sl28.dts"
17 #include <dt-bindings/net/qca-ar803x.h>
20 model = "Kontron SMARC-sAL28 (4 Lanes)";
21 compatible = "kontron,sl28-var1", "kontron,sl28", "fsl,ls1028a";
26 /delete-node/ ethernet-phy@5;
28 phy0: ethernet-phy@4 {
30 eee-broken-1000t;
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H A Dfsl-ls1028a-kontron-sl28-var2.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * Device Tree file for the Kontron SMARC-sAL28 board.
12 /dts-v1/;
13 #include "fsl-ls1028a-kontron-sl28.dts"
16 model = "Kontron SMARC-sAL28 (TSN-on-module)";
17 compatible = "kontron,sl28-var2", "kontron,sl28", "fsl,ls1028a";
21 phy1: ethernet-phy@4 {
23 eee-broken-1000t;
24 eee-broken-100tx;
33 * port instead. Therefore, delete the phy-handle property here.
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H A Dfsl-ls1028a-kontron-sl28.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * Device Tree file for the Kontron SMARC-sAL28 board.
9 /dts-v1/;
10 #include "fsl-ls1028a.dtsi"
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/input/input.h>
16 model = "Kontron SMARC-sAL28";
33 compatible = "gpio-keys";
35 power-button {
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H A Dimx8mp-msc-sm2s.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
9 #include <dt-bindings/net/ti-dp83867.h>
18 stdout-path = &uart2;
21 reg_usb0_host_vbus: regulator-usb0-vbus {
22 compatible = "regulator-fixe
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H A Dimx8mp-debix-som-a-bmb-08.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include "imx8mp-debix-som-a.dtsi"
12 model = "Polyhex i.MX8MPlus Debix SOM A on BMB-08";
13 compatible = "polyhex,imx8mp-debix-so
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H A Dimx8mp-evk.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/phy/phy-imx8-pcie.h>
13 compatible = "fsl,imx8mp-evk", "fsl,imx8mp";
16 stdout-path = &uart2;
19 backlight_lvds: backlight-lvd
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H A Dimx8mp-verdin.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
6 #include <dt-bindings/phy/phy-imx8-pcie.h>
7 #include <dt-bindings/pwm/pwm.h>
12 stdout-pat
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/freebsd-src/sys/dev/mii/
H A Dmii_fdt.c1 /*-
69 {MII_CONTYPE_REVMII, "rev-mii"},
72 {MII_CONTYPE_RGMII_ID, "rgmii-id"},
73 {MII_CONTYPE_RGMII_RXID, "rgmii-rxid"},
74 {MII_CONTYPE_RGMII_TXID, "rgmii-txid"},
79 {MII_CONTYPE_2000BX, "2000base-x"},
80 {MII_CONTYPE_2500BX, "2500base-x"},
88 "phy-handle", "phy", "phy-device" in mii_fdt_get_phynode()
97 return (- in mii_fdt_get_phynode()
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/freebsd-src/sys/contrib/device-tree/src/arm64/amlogic/
H A Dmeson-gxl-s905d-p230.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include <dt-bindings/input/input.h>
11 #include "meson-gxl-s905d.dtsi"
12 #include "meson-gx-p23x-q20x.dtsi"
15 compatible = "amlogic,p230", "amlogic,s905d", "amlogic,meson-gxl";
18 adc-keys {
19 compatible = "adc-keys";
20 io-channels = <&saradc 0>;
21 io-channel-names = "buttons";
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H A Dmeson-g12a-x96-max.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "meson-g12a.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/gpio/meson-g12a-gpio.h>
11 #include <dt-binding
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/freebsd-src/sys/contrib/device-tree/src/arm/ti/omap/
H A Dam5729-beagleboneai.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2014-2019 Texas Instruments Incorporated - https://www.ti.com/
6 /dts-v1/;
9 #include "am57xx-commercial-grade.dtsi"
10 #include "dra74x-mmc-iodela
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H A Dam335x-baltos.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
12 #include <dt-bindings/pwm/pwm.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
20 cpu0-supply = <&vdd1_reg>;
30 compatible = "regulator-fixe
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/freebsd-src/sys/dev/neta/
H A Dif_mvneta.c111 /* Rx/Tx Queue Control */
159 /* Tx Subroutines */
191 #define mvneta_sc_lock(sc) mtx_lock(&sc->mtx)
192 #define mvneta_sc_unlock(sc) mtx_unlock(&sc->mtx)
284 "rx_frame_1_64", "Frame Size 1 - 64"},
286 "rx_frame_65_127", "Frame Size 65 - 127"},
288 "rx_frame_128_255", "Frame Size 128 - 255"},
290 "rx_frame_256_511", "Frame Size 256 - 511"},
292 "rx_frame_512_1023", "Frame Size 512 - 1023"},
294 "rx_fame_1024_max", "Frame Size 1024 - Ma
1011 struct mvneta_tx_ring *tx; mvneta_portdown() local
1252 struct mvneta_tx_ring *tx; mvneta_ring_alloc_tx_queue() local
1296 struct mvneta_tx_ring *tx; mvneta_ring_dealloc_tx_queue() local
1405 struct mvneta_tx_ring *tx; mvneta_ring_init_tx_queue() local
1447 struct mvneta_tx_ring *tx; mvneta_ring_flush_tx_queue() local
1528 struct mvneta_tx_ring *tx; mvneta_tx_queue_init() local
1584 struct mvneta_tx_ring *tx; mvneta_tx_queue_enable() local
1752 struct mvneta_tx_ring *tx; mvneta_tick() local
1833 struct mvneta_tx_ring *tx; mvneta_qflush() local
1854 struct mvneta_tx_ring *tx; mvneta_tx_task() local
1876 struct mvneta_tx_ring *tx; mvneta_xmitfast_locked() local
1921 struct mvneta_tx_ring *tx; mvneta_transmit() local
1970 struct mvneta_tx_ring *tx; mvneta_xmit_locked() local
1998 struct mvneta_tx_ring *tx; mvneta_start() local
2672 struct mvneta_tx_ring *tx; mvneta_tx_queue() local
2847 struct mvneta_tx_ring *tx; mvneta_tx_queue_complete() local
2926 struct mvneta_tx_ring *tx; mvneta_tx_drain() local
3546 struct mvneta_tx_ring *tx; mvneta_update_mib() local
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/freebsd-src/sys/dev/bnxt/bnxt_en/
H A Dhsi_struct_def.h1 /*-
34 * Copyright(c) 2001-2024, Broadcom. All rights reserved. The
71 * * 0x0-0xFFF8 - The function ID
72 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
73 * * 0xFFFD - Reserved for user-space HWRM interface
74 * * 0xFFFF - HWRM
122 /* Engine CKV - The Alias key EC curve and ECC public key information. */
124 /* Engine CKV - Initialization vector. */
126 /* Engine CKV - Authentication tag. */
128 /* Engine CKV - The encrypted data. */
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/freebsd-src/sys/dev/alc/
H A Dif_alc.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
98 * enable MSI-X in alc_attach() depending on the card type. The operator can
248 nitems(alc_ident_table) - 1);
253 { -1, 0, 0 }
258 { -1, 0, 0 }
263 { -
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/freebsd-src/sys/dev/bxe/
H A Decore_hsi.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2007-2017 QLogic Corporation. All rights reserved.
145 /* Up to 16 bytes of NULL-terminated string */
164 (if multiple found, priority order is: NC-SI, UMP, IPMI) */
169 /* Use SPIO4 as an arbiter between: 0-NC_SI, 1-IPMI
170 (can only be used when an add-in board, not BMC, pulls-down SPIO4) */
172 /* Use SPIO4 as an arbiter between: 0-UMP, 1-IPMI
173 (can only be used when an add-in board, not BMC, pulls-down SPIO4) */
175 /* Use SPIO4 as an arbiter between: 0-NC-SI, 1-UMP
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/freebsd-src/sys/dev/qlnx/qlnxe/
H A Dreg_addr.h2 * Copyright (c) 2017-2018 Cavium, Inc.
73 … Mask memory read Bit3 : Mask memory write Bit2 : Mask Completion Bit1 : Mask TX Bit0 : Mask RX
76 … 0x003824UL //Access:R DataWidth:0x20 // tx number of tlp sent
78 …- For ending "endless completion". 0 - When receiving a completion timeout while receiving a compl…
79 … DataWidth:0x4 // 0 - TXCPL sync fifo pop underflow 1 - TXR sync fifo pop underflow 2 - TXW hea…
80 …s:R DataWidth:0x6 // 0 - RX target read and config sync fifo push overflow 1 - RX header syn…
81 …ataWidth:0x14 // 4:0 - TXCPL sync fifo pop status 9:5 - TXR sync fifo pop status 14:10 - TXW hea…
88 …ffff<<0) // Vendor ID. PCI-SIG assigned Manufacturer Identifier. Note: The access attributes of …
90 …ce Identifier. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…
116 … (0x1<<9) // Fast back-to-back transaction ena…
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