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Searched +full:dual +full:- +full:lvds +full:- +full:even +full:- +full:pixels (Results 1 – 7 of 7) sorted by relevance

/freebsd-src/sys/contrib/device-tree/Bindings/display/panel/
H A Dadvantech,idk-2121wr.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/panel/advantech,idk-2121wr.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Advantech IDK-2121WR 21.5" Full-HD dual-LVDS panel
10 - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
11 - Thierry Reding <thierry.reding@gmail.com>
14 The IDK-2121WR from Advantech is a Full-HD dual-LVDS panel.
15 A dual-LVDS interface is a dual-link connection with even pixels traveling
16 on one link, and with odd pixels traveling on the other link.
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H A Dpanel-simple-lvds-dual-ports.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/panel/panel-simpl
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/freebsd-src/sys/contrib/device-tree/Bindings/display/bridge/
H A Dthine,thc63lvd1024.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Thine Electronics THC63LVD1024 LVDS Decoder
10 - Jacopo Mondi <jacopo+renesas@jmondi.org>
11 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
14 The THC63LVD1024 is a dual link LVDS receiver designed to convert LVDS
15 streams to parallel data outputs. The chip supports single/dual input/output
16 modes, handling up to two LVDS input streams and up to two digital CMOS/TTL
19 Single or dual operation mode, output data mapping and DDR output modes are
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H A Dfsl,imx8qxp-ldb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-ldb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale i.MX8qm/qxp LVDS Display Bridge
10 - Liu Ying <victor.liu@nxp.com>
13 The Freescale i.MX8qm/qxp LVDS Display Bridge(LDB) has two channels.
23 LDB split mode to support a dual link LVDS display. The channel indexes
24 have to be different. Channel0 outputs odd pixels and channel1 outputs
25 even pixels.
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/freebsd-src/sys/contrib/device-tree/src/arm64/renesas/
H A Dr8a774c0-ek874-idk-2121wr.dts1 // SPDX-License-Identifier: GPL-2.0
4 * connected to an Advantech IDK-2121WR 21.5" LVDS panel
9 #include "r8a774c0-ek874.dts"
13 compatible = "pwm-backlight";
16 brightness-levels = <0 4 8 16 32 64 128 255>;
17 default-brightness-level = <6>;
19 power-supply = <&reg_12p0v>;
20 enable-gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
23 panel-lvds {
24 compatible = "advantech,idk-2121wr", "panel-lvds";
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/freebsd-src/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx8mp-tqma8mpql-mba8mpxl-lvds-g133han01.dtso1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright (c) 2023 TQ-Systems GmbH <linux@ew.tq-group.com>,
4 * D-82229 Seefeld, Germany.
8 /dts-v1/;
11 #include <dt-bindings/clock/imx8mp-clock.h>
14 compatible = "tq,imx8mp-tqma8mpql-mba8mpxl", "tq,imx8mp-tqma8mpql", "fsl,imx8mp";
26 #address-cells = <1>;
27 #size-cells = <0>;
31 dual-lvds-odd-pixels;
34 remote-endpoint = <&ldb_lvds_ch0>;
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/freebsd-src/sys/dev/drm2/
H A Ddrm_crtc.h3 * Copyright © 2007-2008 Dave Airlie
4 * Copyright © 2007-2008 Intel Corporation
62 * control chips as 'CRTCs'. They can control any type of connector, VGA, LVDS,
104 MODE_UNVERIFIED = -3, /* mode needs to reverified */
105 MODE_BAD = -2, /* unspecified reason */
106 MODE_ERROR = -1 /* error condition */
248 * hold a ref to the fb even though it has already been removed from
300 * drm_crtc_funcs - control CRTCs for a given device
314 * CRTC is simply historical, a CRTC may control LVDS, VGA, DVI, TV out, etc.
360 * drm_crtc - central CRTC control structure
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