Home
last modified time | relevance | path

Searched +full:dual +full:- +full:channel (Results 1 – 25 of 227) sorted by relevance

12345678910

/freebsd-src/sys/contrib/device-tree/Bindings/gpio/
H A Dgpio-xilinx.txt3 Dual channel GPIO controller with configurable number of pins
4 (from 1 to 32 per channel). Every pin can be configured as
6 local interrupts can be enabled on channel basis.
9 - compatible : Should be "xlnx,xps-gpio-1.00.a"
10 - reg : Address and length of the register set for the device
11 - #gpio-cells : Should be two. The first cell is the pin number and the
13 - gpio-controller : Marks the device node as a GPIO controller.
16 - clocks : Input clock specifier. Refer to common clock bindings.
17 - interrupts : Interrupt mapping for GPIO IRQ.
18 - xlnx,all-inputs : if n-th bit is setup, GPIO-n is input
[all …]
H A Dxlnx,gpio-xilinx.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/xlnx,gpio-xilinx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Neeli Srinivas <srinivas.neeli@amd.com>
14 to an AXI4-Lite interface. The AXI GPIO can be configured as either
15 a single or a dual-channel device. The width of each channel is
22 - xlnx,xps-gpio-1.00.a
27 "#gpio-cells":
33 gpio-controller: true
[all …]
/freebsd-src/sys/contrib/device-tree/Bindings/display/bridge/
H A Dfsl,imx8qxp-ldb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-ldb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liu Ying <victor.liu@nxp.com>
19 For i.MX8qxp LDB, each channel supports up to 24bpp parallel input color
23 LDB split mode to support a dual link LVDS display. The channel indexes
27 For i.MX8qm LDB, each channel additionally supports up to 30bpp parallel
29 in dual mode or split mode. In dual mode, the two channels output identical
41 - fsl,imx8qm-ldb
[all …]
/freebsd-src/share/misc/
H A Dpci_vendors5 # Date: 2024-11-25 03:15:02
8 # the PCI ID Project at https://pci-ids.ucw.cz/.
14 # (version 2 or higher) or the 3-clause BSD License.
25 # device device_name <-- single tab
26 # subvendor subdevice subsystem_name <-- two tabs
30 # This is a relabelled RTL-8139
31 8139 AT-250
[all...]
/freebsd-src/sys/contrib/device-tree/Bindings/iio/adc/
H A Dxilinx-xadc.txt22 - compatible: Should be one of
23 * "xlnx,zynq-xadc-1.00.a": When using the ZYNQ device
25 * "xlnx,axi-xadc-1.00.a": When using the axi-xadc pcore to
27 * "xlnx,system-management-wiz-1.3": When using the
30 - reg: Address and length of the register set for the device
31 - interrupts: Interrupt for the XADC control interface.
32 - clocks: When using the ZYNQ this must be the ZYNQ PCAP clock,
33 when using the axi-xadc or the axi-system-management-wizard this must be
37 - xlnx,external-mux:
42 * "dual": External multiplexer mode is used with two
[all …]
H A Dmicrochip,mcp3911.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Microchip MCP3911 Dual channel analog front end (ADC)
11 - Marcus Folkesson <marcus.folkesson@gmail.com>
12 - Kent Gustavsson <nedo80@gmail.com>
15 Bindings for the Microchip MCP3911 Dual channel ADC device. Datasheet can be
21 - microchip,mcp3910
22 - microchip,mcp3911
23 - microchip,mcp3912
[all …]
H A Dadc.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jonathan Cameron <jic23@kernel.org>
17 pattern: "^channel(@[0-
[all...]
/freebsd-src/sys/contrib/device-tree/Bindings/display/imx/
H A Dldb.txt1 Device-Tree bindings for LVDS Display Bridge (ldb)
6 The LVDS Display Bridge device tree node contains up to two lvds-channel
10 - #address-cells : should be <1>
11 - #size-cells : should be <0>
12 - compatible : should be "fsl,imx53-ldb" or "fsl,imx6q-ldb".
15 interfaces as input for each LVDS channel.
16 - gpr : should be <&gpr> on i.MX53 and i.MX6q.
17 The phandle points to the iomuxc-gpr region containing the LVDS
19 - clocks, clock-names : phandles to the LDB divider and selector clocks and to
21 Documentation/devicetree/bindings/clock/clock-bindings.txt
[all …]
/freebsd-src/sys/contrib/device-tree/Bindings/
H A Dtrivial-devices.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/trivial-devices.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
27 spi-ma
[all...]
/freebsd-src/sys/contrib/device-tree/src/arm/allwinner/
H A Dsun8i-v3s-licheepi-zero-dock.dts4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
43 #include "sun8i-v3s-licheepi-zero.dts"
45 #include <dt-bindings/input/input.h>
49 compatible = "licheepi,licheepi-zero-dock", "licheepi,licheepi-zero",
50 "allwinner,sun8i-v3s";
63 allwinner,leds-active-low;
68 vref-supply = <&reg_vcc3v0>;
71 button-200 {
74 channel = <0>;
[all …]
H A Dsun6i-a31s-inet-q972.dts4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
43 /dts-v1/;
44 #include "sun6i-a31s.dtsi"
45 #include "sun6i-reference-design-tablet.dtsi"
49 compatible = "inet-tek,inet-q972", "allwinner,sun6i-a31s";
60 compatible = "edt,edt-ft5406";
62 interrupt-parent = <&pio>;
64 touchscreen-size-x = <768>;
65 touchscreen-size-y = <1024>;
[all …]
H A Dsun4i-a10-inet97fv2.dts6 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
45 /dts-v1/;
46 #include "sun4i-a10.dtsi"
47 #include "sunxi-common-regulators.dtsi"
49 #include <dt-bindings/gpio/gpio.h>
50 #include <dt-bindings/input/input.h>
51 #include <dt-bindings/interrupt-controller/irq.h>
54 model = "INet-97F Rev 02";
55 compatible = "primux,inet97fv2", "allwinner,sun4i-a10";
[all …]
H A Dsun8i-a23-evb.dts4 * Maxime Ripard <maxime.ripard@free-electrons.com>
6 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
45 /dts-v1/;
46 #include "sun8i-a23.dtsi"
47 #include "sunxi-common-regulators.dtsi"
49 #include <dt-bindings/gpio/gpio.h>
50 #include <dt-bindings/input/input.h>
54 compatible = "allwinner,sun8i-a23-evb", "allwinner,sun8i-a23";
63 stdout-path = "serial0:115200n8";
[all …]
H A Dsunxi-reference-design-tablet.dtsi4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
43 #include <dt-bindings/gpio/gpio.h>
44 #include <dt-bindings/input/input.h>
45 #include "sunxi-common-regulators.dtsi"
48 pinctrl-names = "default";
49 pinctrl-0 = <&i2c0_pins>;
54 pinctrl-names = "default";
55 pinctrl-0 = <&i2c1_pins>;
60 vref-supply = <&reg_vcc3v0>;
[all …]
H A Dsun5i-a13-olinuxino.dts4 * Maxime Ripard <maxime.ripard@free-electrons.com>
6 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
45 /dts-v1/;
46 #include "sun5i-a13.dtsi"
47 #include "sunxi-common-regulators.dtsi"
49 #include <dt-bindings/gpio/gpio.h>
50 #include <dt-bindings/input/input.h>
53 model = "Olimex A13-Olinuxino";
54 compatible = "olimex,a13-olinuxino", "allwinner,sun5i-a13";
[all …]
H A Dsun4i-a10-chuwi-v7-cw0825.dts4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
43 /dts-v1/;
44 #include "sun4i-a10.dtsi"
45 #include "sunxi-common-regulators.dtsi"
46 #include <dt-bindings/gpio/gpio.h>
47 #include <dt-bindings/input/input.h>
48 #include <dt-bindings/interrupt-controller/irq.h>
52 compatible = "chuwi,v7-cw0825", "allwinner,sun4i-a10";
59 stdout-path = "serial0:115200n8";
[all …]
H A Dsun5i-a10s-olinuxino-micro.dts4 * Maxime Ripard <maxime.ripard@free-electrons.com>
6 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
45 /dts-v1/;
46 #include "sun5i-a10s.dtsi"
47 #include "sunxi-common-regulators.dtsi"
49 #include <dt-bindings/gpio/gpio.h>
50 #include <dt-bindings/input/input.h>
53 model = "Olimex A10s-Olinuxino Micro";
54 compatible = "olimex,a10s-olinuxino-micro", "allwinner,sun5i-a10s";
[all …]
H A Dsun7i-a20-olimex-som-evb.dts2 * Copyright 2015 - Marcus Cooper <codekipper@gmail.com>
3 * Copyright 2015 - Karsten Merker <merker@debian.org>
5 * This file is dual-licensed: you can use it either under the terms
6 * of the GPL or the X11 license, at your option. Note that this dual
44 /dts-v1/;
45 #include "sun7i-a20.dtsi"
46 #include "sunxi-common-regulators.dtsi"
48 #include <dt-bindings/gpio/gpio.h>
49 #include <dt-bindings/input/input.h>
50 #include <dt-bindings/interrupt-controller/irq.h>
[all …]
H A Dsun7i-a20-olinuxino-micro.dts4 * Maxime Ripard <maxime.ripard@free-electrons.com>
6 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
45 /dts-v1/;
46 #include "sun7i-a20.dtsi"
47 #include "sunxi-common-regulators.dtsi"
49 #include <dt-bindings/gpio/gpio.h>
50 #include <dt-bindings/input/input.h>
51 #include <dt-bindings/interrupt-controller/irq.h>
54 model = "Olimex A20-Olinuxino Micro";
[all …]
/freebsd-src/sys/contrib/dev/iwlwifi/fw/api/
H A Drs.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2012-2014, 2018-2022, 2024 Intel Corporation
12 * enum iwl_tlc_mng_cfg_flags - options for TLC config flags
18 * @IWL_TLC_MNG_CFG_FLAGS_HE_DCM_NSS_1_MSK: enable HE Dual Carrier Modulation
21 * @IWL_TLC_MNG_CFG_FLAGS_HE_DCM_NSS_2_MSK: enable HE Dual Carrie
[all...]
/freebsd-src/sys/contrib/device-tree/Bindings/display/
H A Dmipi-dsi-bus.txt8 This document describes DSI bus-specific properties only or defines existing
25 - #address-cells: The number of cells required to represent an address on the
26 bus. DSI peripherals are addressed using a 2-bit virtual channel number, so
29 - #size-cells: Should be 0. There are cases where it makes sense to use a
33 - clock-master: boolean. Should be enabled if the host is being used in
43 ------------------------------------------------------
49 device-specific properties.
52 - reg: The virtual channel number of a DSI peripheral. Must be in the range
55 Some DSI peripherals respond to more than a single virtual channel. In that
57 - The reg property can take multiple entries, one for each virtual channel
[all …]
/freebsd-src/sys/contrib/device-tree/Bindings/mfd/
H A Dmediatek,mt6370.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - ChiYuan Huang <cy_huang@richtek.com>
13 MT6370 is a highly-integrated smart power management IC, which includes a
14 single cell Li-Ion/Li-Polymer switching battery charger, a USB Type-C &
15 Power Delivery (PD) controller, dual flash LED current sources, a RGB LED
26 wakeup-source: true
31 interrupt-controller: true
33 "#interrupt-cells":
[all …]
/freebsd-src/sys/contrib/device-tree/Bindings/input/
H A Diqs626a.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jeff LaBundy <jeff@labundy.com>
13 The Azoteq IQS626A is a 14-channel capacitive touch controller that features
14 additional Hall-effect and inductive sensing capabilities.
19 - $ref: touchscreen/touchscreen.yaml#
31 "#address-cells":
34 "#size-cells":
37 azoteq,suspend-mode:
[all …]
/freebsd-src/sys/contrib/device-tree/Bindings/hwmon/
H A Dadi,ltc2992.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandru Tachici <alexandru.tachici@analog.com>
13 Linear Technology 2992 Dual Wide Range Power Monitor
14 https://www.analog.com/media/en/technical-documentation/data-sheets/ltc2992.pdf
19 - adi,ltc2992
24 '#address-cells':
27 '#size-cells':
30 avcc-supply: true
[all …]
/freebsd-src/sys/contrib/device-tree/Bindings/display/panel/
H A Dsharp,lq101r1sx01.txt3 This panel requires a dual-channel DSI host to operate. It supports two modes:
4 - left-right: each channel drives the left or right half of the screen
5 - even-odd: each channel drives the even or odd lines of the screen
8 driven by the first link (DSI-LINK1), left or even, is considered the primary
10 to the peripheral driven by the second link (DSI-LINK2, right or odd).
12 Note that in video mode the DSI-LINK1 interface always provides the left/even
13 pixels and DSI-LINK2 always provides the right/odd pixels. In command mode it
19 - compatible: should be "sharp,lq101r1sx01"
20 - reg: DSI virtual channel of the peripheral
22 Required properties (for DSI-LINK1 only):
[all …]

12345678910