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/freebsd-src/sys/contrib/device-tree/Bindings/clock/
H A Dqcom,dispcc-sc8280xp.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,dispcc-sc8280x
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H A Dqcom,mmcc.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Multimedia Clock & Reset Controller
10 - Jeffrey Hugo <quic_jhugo@quicinc.com>
11 - Taniya Das <quic_tdas@quicinc.com>
20 - qcom,mmcc-apq8064
21 - qcom,mmcc-apq8084
22 - qcom,mmcc-msm8226
23 - qcom,mmcc-msm8660
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/freebsd-src/sys/contrib/device-tree/Bindings/display/tegra/
H A Dnvidia,tegra124-dpaux.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra124-dpaux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra DisplayPort AUX Interface
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
14 The Tegra Display Port Auxiliary (DPAUX) pad controller manages two
16 controller.
18 When configured for DisplayPort AUX operation, the DPAUX controller
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/freebsd-src/sys/contrib/device-tree/Bindings/display/xlnx/
H A Dxlnx,zynqmp-dpsub.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/xlnx/xlnx,zynqmp-dpsub.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Xilinx ZynqMP DisplayPort Subsystem
10 The DisplayPort subsystem of Xilinx ZynqMP (Zynq UltraScale+ MPSoC)
11 implements the display and audio pipelines based on the DisplayPort v1.2
14 +------------------------------------------------------------+
15 +--------+ | +----------------+ +-----------+ |
16 | DPDMA | --->| | --> | Video | Video +-------------+ |
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/freebsd-src/sys/contrib/device-tree/Bindings/display/msm/
H A Ddp-controller.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/msm/dp-controlle
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H A Dqcom,sc7180-mdss.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,sc7180-mdss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krishna Manikandan <quic_mkrishn@quicinc.com>
14 sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
17 $ref: /schemas/display/msm/mdss-common.yaml#
21 const: qcom,sc7180-mdss
25 - description: Display AHB clock from gcc
26 - description: Display AHB clock from dispcc
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H A Dqcom,sc7280-mdss.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,sc7280-mdss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krishna Manikandan <quic_mkrishn@quicinc.com>
14 sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
17 $ref: /schemas/display/msm/mdss-common.yaml#
21 const: qcom,sc7280-mdss
25 - description: Display AHB clock from gcc
26 - description: Display AHB clock from dispcc
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H A Dqcom,sc8280xp-mdss.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,sc8280xp-mdss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <andersson@kernel.org>
14 sub-blocks like DPU display controller, DSI and DP interfaces etc.
16 $ref: /schemas/display/msm/mdss-common.yaml#
20 const: qcom,sc8280xp-mdss
24 - description: Display AHB clock from gcc
25 - description: Display AHB clock from dispcc
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H A Dqcom,sm8350-mdss.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,sm8350-mdss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Robert Foss <robert.foss@linaro.org>
13 MSM Mobile Display Subsystem(MDSS) that encapsulates sub-blocks like
14 DPU display controller, DSI and DP interfaces etc.
16 $ref: /schemas/display/msm/mdss-common.yaml#
21 - const: qcom,sm8350-mdss
25 - description: Display AHB clock from gcc
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H A Dqcom,sdm670-mdss.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,sdm670-mdss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Richard Acayan <mailingradian@gmail.com>
13 SDM670 MSM Mobile Display Subsystem (MDSS), which encapsulates sub-blocks
14 like DPU display controller, DSI and DP interfaces etc.
16 $ref: /schemas/display/msm/mdss-common.yaml#
20 const: qcom,sdm670-mdss
24 - description: Display AHB clock from gcc
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H A Dqcom,sdm845-mdss.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,sdm845-mdss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krishna Manikandan <quic_mkrishn@quicinc.com>
14 sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
17 $ref: /schemas/display/msm/mdss-common.yaml#
21 const: qcom,sdm845-mdss
25 - description: Display AHB clock from gcc
26 - description: Display core clock
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/freebsd-src/sys/contrib/device-tree/Bindings/dma/xilinx/
H A Dxlnx,zynqmp-dpdma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/xilinx/xlnx,zynqmp-dpdma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Xilinx ZynqMP DisplayPort DMA Controller
11 DisplayPort Subsystem. The DMA engine supports up to 6 DMA channels (3
16 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
19 - $ref: ../dma-controller.yaml#
22 "#dma-cells":
25 The cell is the DMA channel ID (see dt-bindings/dma/xlnx-zynqmp-dpdma.h
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/freebsd-src/sys/contrib/device-tree/Bindings/display/
H A Ddp-aux-bus.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/dp-aux-bus.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: DisplayPort AUX bus
10 - Douglas Anderson <dianders@chromium.org>
13 DisplayPort controllers provide a control channel to the sinks that
20 of the DP controller under the "aux-bus" node.
29 const: aux-bus
32 $ref: panel/panel-common.yaml#
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/freebsd-src/sys/contrib/device-tree/Bindings/connector/
H A Dusb-connector.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/connector/usb-connector.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
14 of a USB interface controller or a separate node when it is attached to both
15 MUX and USB interface controller.
20 - enum:
21 - usb-a-connector
22 - usb-b-connector
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/freebsd-src/sys/contrib/device-tree/Bindings/display/bridge/
H A Dite,it6505.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schema
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H A Dti,sn65dsi86.txt2 --------------------------------
8 - compatible: Must be "ti,sn65dsi86"
9 - reg: i2c address of the chip, 0x2d as per datasheet
10 - enable-gpios: gpio specification for bridge_en pin (active high)
12 - vccio-supply: A 1.8V supply that powers up the digital IOs.
13 - vpll-supply: A 1.8V supply that powers up the displayport PLL.
14 - vcca-supply: A 1.2V supply that powers up the analog circuits.
15 - vcc-supply: A 1.2V supply that powers up the digital core.
18 - interrupts-extended: Specifier for the SN65DSI86 interrupt line.
20 - gpio-controller: Marks the device has a GPIO controller.
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H A Dgoogle,cros-ec-anx7688.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/google,cros-ec-anx7688.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ChromeOS EC ANX7688 HDMI to DP Converter through Type-C Port
10 - Nicolas Boichat <drinkcat@chromium.org>
14 DisplayPort 1.3 Ultra-HDi (4096x2160p60). It is an Analogix ANX7688 chip
15 which is connected to and operated by the ChromeOS Embedded Controller
16 (See google,cros-ec.yaml). It is accessed using I2C tunneling through
18 (See google,cros-ec-i2c-tunnel.yaml).
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H A Danalogix,anx7814.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Analogix ANX7814 SlimPort (Full-HD Transmitter)
10 - Andrzej Hajda <andrzej.hajda@intel.com>
11 - Neil Armstrong <neil.armstrong@linaro.org>
12 - Robert Foss <robert.foss@linaro.org>
17 - analogix,anx7808
18 - analogix,anx7812
19 - analogix,anx7814
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H A Dcdns,mhdp8546.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Swapnil Jakhade <sjakhade@cadence.com>
11 - Yuti Amonkar <yamonkar@cadence.com>
16 - cdns,mhdp8546
17 - ti,j721e-mhdp8546
22 - description:
26 - description:
28 - description:
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/freebsd-src/sys/contrib/device-tree/Bindings/phy/
H A Dsamsung,dp-video-phy.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/samsung,dp-video-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung Exynos SoC DisplayPort PHY
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Marek Szyprowski <m.szyprowski@samsung.com>
12 - Sylwester Nawrocki <s.nawrocki@samsung.com>
17 - samsung,exynos5250-dp-video-phy
18 - samsung,exynos5420-dp-video-phy
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H A Dphy-cadence-torrent.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/phy-cadence-torren
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H A Dqcom,sc8280xp-qmp-usb43dp-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm QMP USB4-USB3-DP PHY controller (SC8280XP)
10 - Vinod Koul <vkoul@kernel.org>
13 The QMP PHY controller supports physical layer functionality for a number of
19 - qcom,sc7180-qmp-usb3-dp-phy
20 - qcom,sc7280-qmp-usb3-dp-phy
21 - qcom,sc8180x-qmp-usb3-dp-phy
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/freebsd-src/sys/contrib/device-tree/Bindings/display/connector/
H A Ddp-connector.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/connector/dp-connector.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: DisplayPort Connector
10 - Tomi Valkeinen <tomi.valkeinen@ti.com>
14 const: dp-connector
20 - full-size
21 - mini
23 hpd-gpios:
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/freebsd-src/sys/contrib/device-tree/Bindings/display/exynos/
H A Dexynos_dp.txt5 -dp-controller node
6 -dptx-phy node(defined inside dp-controller node)
8 For the DP-PHY initialization, we use the dptx-phy node.
9 Required properties for dptx-phy: deprecated, use phys and phy-names
10 -reg: deprecated
12 -samsung,enable-mask: deprecated
13 The bit-mask used to enable/disable DP PHY.
15 For the Panel initialization, we read data from dp-controller node.
16 Required properties for dp-controller:
17 -compatible:
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/freebsd-src/sys/contrib/device-tree/Bindings/display/mediatek/
H A Dmediatek,dpi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schema
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