| /freebsd-src/sys/contrib/device-tree/Bindings/mfd/ |
| H A D | rockchip,rk806.yaml | 36 The input supply for dcdc-reg1. 40 The input supply for dcdc-reg2. 44 The input supply for dcdc-reg3. 48 The input supply for dcdc-reg4. 52 The input supply for dcdc-reg5. 56 The input supply for dcdc-reg6. 60 The input supply for dcdc-reg7. 64 The input supply for dcdc-reg8. 68 The input supply for dcdc-reg9. 72 The input supply for dcdc-reg10. [all …]
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| H A D | actions,atc260x.yaml | 49 * ATC2603C: dcdc[1-3], ldo[1-3,5-8,11,12], switchldo1 50 * ATC2609A: dcdc[0-4], ldo[0-9] 74 "^(dcdc[0-4]|ldo[0-9]|ldo1[1-2]|switchldo1)-supply$": 77 "^(dcdc[0-4]|ldo[0-9]|ldo1[1-2])$": 99 "^(dcdc[0,4]|ldo[0,4,9])(-supply)?$": false 101 "^(ldo|dcdc)": 113 "^(dcdc|ldo[3-9])":
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| H A D | x-powers,axp152.yaml | 26 x-powers,dcdc-freq: 35 x-powers,dcdc-freq: 90 x-powers,dcdc-freq: false 271 x-powers,dcdc-freq: 277 "^(([a-f])?ldo[0-9]|dcdc[0-7a-e]|ldo(_|-)io(0|1)|(dc1)?sw|rtc(_|-)ldo|cpusldo|drivevbus|dc5ldo|boost)$": 292 x-powers,dcdc-workmode: 296 Only valid for DCDC regulators. Setup 1 for PWM mode, 0 297 for AUTO (PWM/PFM) mode. The DCDC regulators work in a 370 x-powers,dcdc-freq = <1500>;
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| H A D | ricoh,rn5t618.yaml | 14 integrates 3 to 5 step-down DCDC converters, 7 to 10 low-dropout regulators, 30 "^(DCDC[1-4]|LDO[1-5]|LDORTC[12])$": 42 "^(DCDC[1-3]|LDO[1-5]|LDORTC[12])$": 54 "^(DCDC[1-5]|LDO[1-9]|LDO10|LDORTC[12])$":
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| H A D | as3711.txt | 1 AS3711 is an I2C PMIC from Austria MicroSystems with multiple DCDC and LDO power 3 DCDC converters are defined. Other DCDC and LDO supplies are configured, using
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| H A D | axp20x.txt | 47 - x-powers,dcdc-freq: defines the work frequency of DC-DC in KHz 74 Optional properties for DCDC regulators: 75 - x-powers,dcdc-workmode: 1 for PWM mode, 0 for AUTO (PWM/PFM) mode 77 The DCDC regulators work in a mixed PWM/PFM mode, 239 x-powers,dcdc-freq = <1500>;
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| H A D | rk808.txt | 102 the 'n' in regulator name, as in DCDC_REGn or LDOn, represents the DCDC or LDO 111 the 'n' in regulator name, as in DCDC_REGn or LDOn, represents the DCDC or LDO 122 the 'n' in regulator name, as in DCDC_REGn or LDOn, represents the DCDC or LDO 137 the 'n' in regulator name, as in DCDC_REGn or LDOn, represents the DCDC or LDO
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| /freebsd-src/sys/contrib/device-tree/src/arm64/rockchip/ |
| H A D | rk3588-edgeble-neu6b.dtsi | |
| H A D | rk3588-quartzpro64.dts | 499 vdd_gpu_s0: dcdc-reg1 { 516 vdd_npu_s0: dcdc-reg2 { 529 vdd_log_s0: dcdc-reg3 { 543 vdd_vdenc_s0: dcdc-reg4 { 557 vdd_gpu_mem_s0: dcdc-reg5 { 575 vdd_npu_mem_s0: dcdc-reg6 { 589 vcc_2v0_pldo_s3: dcdc-reg7 { 603 vdd_vdenc_mem_s0: dcdc-reg8 { 616 vdd2_ddr_s3: dcdc-reg9 { 626 vcc_1v1_nldo_s3: dcdc [all...] |
| H A D | rk3588-evb1-v10.dts | 568 vdd_gpu_s0: dcdc-reg1 { 584 vdd_npu_s0: dcdc-reg2 { 596 vdd_log_s0: dcdc-reg3 { 609 vdd_vdenc_s0: dcdc-reg4 { 622 vdd_gpu_mem_s0: dcdc-reg5 { 639 vdd_npu_mem_s0: dcdc-reg6 { 652 vcc_2v0_pldo_s3: dcdc-reg7 { 665 vdd_vdenc_mem_s0: dcdc-reg8 { 677 vdd2_ddr_s3: dcdc-reg9 { 686 vcc_1v1_nldo_s3: dcdc [all...] |
| H A D | rk3588-turing-rk1.dtsi | 336 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 { 349 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 { 362 vdd_log_s0: dcdc-reg3 { 376 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 { 389 vdd_ddr_s0: dcdc-reg5 { 403 vdd2_ddr_s3: dcdc-reg6 { 413 vcc_2v0_pldo_s3: dcdc-reg7 { 427 vcc_3v3_s3: dcdc-reg8 { 440 vddq_ddr_s0: dcdc-reg9 { 450 vcc_1v8_s3: dcdc [all...] |
| H A D | rk3588s-orangepi-5.dts | 410 vdd_gpu_s0: dcdc-reg1 { 423 vdd_cpu_lit_s0: dcdc-reg2 { 436 vdd_log_s0: dcdc-reg3 { 450 vdd_vdenc_s0: dcdc-reg4 { 463 vdd_ddr_s0: dcdc-reg5 { 477 vcc_1v1_nldo_s3: vdd2_ddr_s3: dcdc-reg6 { 489 vcc_2v0_pldo_s3: dcdc-reg7 { 503 vcc_3v3_s3: dcdc-reg8 { 516 vddq_ddr_s0: dcdc-reg9 { 526 vcc_1v8_s3: dcdc [all...] |
| H A D | rk3588-coolpi-cm5.dtsi | 380 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 { 393 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 { 406 vdd_log_s0: dcdc-reg3 { 420 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 { 433 vdd_ddr_s0: dcdc-reg5 { 447 vdd2_ddr_s3: dcdc-reg6 { 457 vcc_2v0_pldo_s3: dcdc-reg7 { 471 vcc_3v3_s3: dcdc-reg8 { 484 vddq_ddr_s0: dcdc-reg9 { 494 vcc_1v8_s3: dcdc [all...] |
| H A D | rk3588s-rock-5a.dts | 455 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 { 468 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 { 481 vdd_log_s0: dcdc-reg3 { 495 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 { 508 vdd_ddr_s0: dcdc-reg5 { 522 vdd2_ddr_s3: dcdc-reg6 { 532 vcc_2v0_pldo_s3: dcdc-reg7 { 546 vcc_3v3_s3: dcdc-reg8 { 559 vddq_ddr_s0: dcdc-reg9 { 569 vcc_1v8_s3: dcdc [all...] |
| H A D | rk3588-rock-5b.dts | 529 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 { 542 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 { 555 vdd_log_s0: dcdc-reg3 { 569 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 { 582 vdd_ddr_s0: dcdc-reg5 { 596 vdd2_ddr_s3: dcdc-reg6 { 606 vcc_2v0_pldo_s3: dcdc-reg7 { 620 vcc_3v3_s3: dcdc-reg8 { 633 vddq_ddr_s0: dcdc-reg9 { 643 vcc_1v8_s3: dcdc [all...] |
| H A D | rk3588s-indiedroid-nova.dts | 571 vdd_gpu_s0: dcdc-reg1 { 583 vdd_cpu_lit_s0: dcdc-reg2 { 595 vdd_logic_s0: dcdc-reg3 { 608 vdd_vdenc_s0: dcdc-reg4 { 620 vdd_ddr_s0: dcdc-reg5 { 633 vdd2_ddr_s3: dcdc-reg6 { 644 vcc_2v0_pldo_s3: dcdc-reg7 { 656 vcc_3v3_s3: dcdc-reg8 { 668 vddq_ddr_s0: dcdc-reg9 { 679 vcc_1v8_s3: dcdc [all...] |
| H A D | rk3588-jaguar.dts | 534 vdd_gpu_s0: dcdc-reg1 { 547 vdd_cpu_lit_s0: dcdc-reg2 { 560 vdd_log_s0: dcdc-reg3 { 574 vdd_vdenc_s0: dcdc-reg4 { 587 vdd_ddr_s0: dcdc-reg5 { 601 vdd2_ddr_s3: dcdc-reg6 { 611 vcc_2v0_pldo_s3: dcdc-reg7 { 625 vcc_3v3_s3: dcdc-reg8 { 638 vddq_ddr_s0: dcdc-reg9 { 648 vcc_1v8_s3: dcdc [all...] |
| H A D | rk3588-orangepi-5-plus.dts | 532 vdd_gpu_s0: dcdc-reg1 { 545 vdd_cpu_lit_s0: dcdc-reg2 { 558 vdd_log_s0: dcdc-reg3 { 572 vdd_vdenc_s0: dcdc-reg4 { 585 vdd_ddr_s0: dcdc-reg5 { 599 vdd2_ddr_s3: dcdc-reg6 { 609 vcc_2v0_pldo_s3: dcdc-reg7 { 623 vcc_3v3_s3: dcdc-reg8 { 636 vddq_ddr_s0: dcdc-reg9 { 646 vcc_1v8_s3: dcdc [all...] |
| H A D | rk3588s-coolpi-4b.dts | 502 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 { 515 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 { 528 vdd_log_s0: dcdc-reg3 { 542 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 { 555 vdd_ddr_s0: dcdc-reg5 { 569 vdd2_ddr_s3: dcdc-reg6 { 579 vcc_2v0_pldo_s3: dcdc-reg7 { 593 vcc_3v3_s3: dcdc-reg8 { 606 vddq_ddr_s0: dcdc-reg9 { 616 vcc_1v8_s3: dcdc [all...] |
| H A D | rk3588-nanopc-t6.dts | |
| /freebsd-src/sys/contrib/device-tree/Bindings/regulator/ |
| H A D | tps65090.txt | 11 dcdc[1-3], fet[1-7] and ldo[1-2] respectively. 12 - vsys[1-3]-supply: The input supply for DCDC[1-3] respectively. 19 - dcdc-ext-control-gpios: This is applicable for DCDC1, DCDC2 and DCDC3. 57 dcdc-ext-control-gpios = <&gpio 10 0>;
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| H A D | da9210.txt | 1 * Dialog Semiconductor DA9210 Multi-phase 12A DCDC BUCK Converter 13 DCDC.
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| /freebsd-src/sys/contrib/device-tree/Bindings/display/panel/ |
| H A D | jdi,lt070me05000.yaml | 34 dcdc-en-gpios: 49 - dcdc-en-gpios 70 dcdc-en-gpios = <&pm8921_gpio 23 GPIO_ACTIVE_HIGH>;
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| /freebsd-src/sys/contrib/device-tree/include/dt-bindings/regulator/ |
| H A D | active-semi,8865-regulator.h | 12 * ACT8865_REGULATOR_MODE_FIXED: It is specific to DCDC regulators and it 19 * ACT8865_REGULATOR_MODE_LOWPOWER: For DCDC and LDO regulators; it specify
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| H A D | active-semi,8945a-regulator.h | 14 * ACT8945A_REGULATOR_MODE_FIXED: It is specific to DCDC regulators and it 21 * ACT8945A_REGULATOR_MODE_LOWPOWER: For DCDC and LDO regulators; it specify
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