| /freebsd-src/sys/contrib/device-tree/Bindings/memory-controllers/ |
| H A D | st,stm32-fmc2-ebi-props.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/memory-controllers/st,stm32-fmc2-ebi-props.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Christophe Kerello <christophe.kerello@foss.st.com> 11 - Marek Vasut <marex@denx.de> 14 st,fmc2-ebi-cs-transaction-type: 33 st,fmc2-ebi-cs-cclk-enable: 40 st,fmc2-ebi-cs-mux-enable: 46 st,fmc2-ebi-cs-buswidth: [all …]
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| H A D | ti-aemif.txt | 4 provide a glue-less interface to a variety of asynchronous memory devices like 11 Davinci DM646x - http://www.ti.com/lit/ug/sprueq7c/sprueq7c.pdf 12 OMAP-L138 (DA850) - http://www.ti.com/lit/ug/spruh77a/spruh77a.pdf 13 Kestone - http://www.ti.com/lit/ug/sprugz3a/sprugz3a.pdf 17 - compatible: "ti,davinci-aemif" 18 "ti,keystone-aemif" 19 "ti,da850-aemif" 21 - reg: contains offset/length value for AEMIF control registers 24 - #address-cells: Must be 2. The partition number has to be encoded in the 25 first address cell and it may accept values 0..N-1 [all …]
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| H A D | atmel,ebi.txt | 5 The EBI provides a glue-less interface to asynchronous memories through the SMC 10 - compatible: "atmel,at91sam9260-ebi" 11 "atmel,at91sam9261-ebi" 12 "atmel,at91sam9263-ebi0" 13 "atmel,at91sam9263-ebi1" 14 "atmel,at91sam9rl-ebi" 15 "atmel,at91sam9g45-ebi" 16 "atmel,at91sam9x5-ebi" 17 "atmel,sama5d3-ebi" 18 "microchip,sam9x60-ebi" [all …]
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| H A D | st,stm32-fmc2-ebi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/memory-controller [all...] |
| /freebsd-src/sys/contrib/device-tree/src/arm/st/ |
| H A D | stm32mp15xx-dhcor-drc-compact.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) 21 stdout-path = "serial0:115200n8"; 25 compatible = "gpio-leds"; 29 default-state = "off"; 35 default-state = "off"; 40 compatible = "regulator-fixed"; 41 regulator-name = "vio"; 42 regulator-min-microvolt = <3300000>; 43 regulator-max-microvolt = <3300000>; 45 regulator-always-on; [all …]
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| H A D | stm32mp15xx-dhcom-som.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (C) 2019-2020 Marek Vasut <marex@denx.de> 6 #include "stm32mp15-pinctrl.dtsi" 7 #include "stm32mp15xxaa-pinctrl.dtsi" 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/mfd/st,stpmic1.h> 24 reserved-memory { 25 #address-cells = <1>; 26 #size-cells = <1>; 30 compatible = "shared-dma-pool"; [all …]
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| /freebsd-src/sys/contrib/device-tree/Bindings/display/samsung/ |
| H A D | samsung,fimd.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Inki Dae <inki.dae@samsung.com> 11 - Seung-Woo Kim <sw0312.kim@samsung.com> 12 - Kyungmin Park <kyungmin.park@samsung.com> 13 - Krzysztof Kozlowski <krzk@kernel.org> 18 - samsung,s3c2443-fimd 19 - samsung,s3c6400-fimd 20 - samsung,s5pv210-fimd [all …]
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| H A D | samsung,exynos7-decon.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/samsung/samsung,exynos7-decon.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Inki Dae <inki.dae@samsung.com> 11 - Seung-Woo Kim <sw0312.kim@samsung.com> 12 - Kyungmin Park <kyungmin.park@samsung.com> 13 - Krzysztof Kozlowski <krzk@kernel.org> 22 const: samsung,exynos7-decon 27 clock-names: [all …]
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| /freebsd-src/sys/contrib/device-tree/Bindings/display/exynos/ |
| H A D | samsung-fimd.txt | 1 Device-Tree bindings for Samsung SoC display controller (FIMD) 8 - compatible: value should be one of the following 9 "samsung,s3c2443-fimd"; /* for S3C24XX SoCs */ 10 "samsung,s3c6400-fimd"; /* for S3C64XX SoCs */ 11 "samsung,s5pv210-fimd"; /* for S5PV210 SoC */ 12 "samsung,exynos3250-fimd"; /* for Exynos3250/3472 SoCs */ 13 "samsung,exynos4210-fimd"; /* for Exynos4 SoCs */ 14 "samsung,exynos5250-fimd"; /* for Exynos5250 SoCs */ 15 "samsung,exynos5420-fimd"; /* for Exynos5420/5422/5800 SoCs */ 17 - reg: physical base address and length of the FIMD registers set. [all …]
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| /freebsd-src/usr.bin/tr/ |
| H A D | tr.c | 1 /*- 2 * SPDX-License-Identifier: BSD-3-Clause 55 static struct cset *setup(char *, STR *, int, int); 70 if (caph_limit_stdio() == -1) in main() 77 while ((ch = getopt(argc, argv, "Ccdsu")) != -1) in main() 100 argc -= optind; in main() 117 * tr -ds [-Cc] string1 string2 in main() 125 delete = setup(argv[0], &s1, cflag, Cflag); in main() 126 squeeze = setup(argv[1], &s2, 0, 0); in main() 140 * tr -d [-Cc] string1 in main() [all …]
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| /freebsd-src/sys/contrib/device-tree/src/arm/ti/keystone/ |
| H A D | keystone-k2l-evm.dts | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2014-2017 Texas Instruments Incorporated - https://www.ti.com/ 7 /dts-v1/; 10 #include "keystone-k2l.dtsi" 13 compatible = "ti,k2l-evm", "ti,k2l", "ti,keystone"; 16 reserved-memory { 17 #address-cell [all...] |
| H A D | keystone-k2e-evm.dts | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2013-2017 Texas Instruments Incorporated - https://www.ti.com/ 7 /dts-v1/; 10 #include "keystone-k2e.dtsi" 13 compatible = "ti,k2e-evm", "ti,k2e", "ti,keystone"; 16 reserved-memory { 17 #address-cell [all...] |
| H A D | keystone-k2hk-evm.dts | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2013-2017 Texas Instruments Incorporated - https://www.ti.com/ 7 /dts-v1/; 10 #include "keystone-k2hk.dtsi" 13 compatible = "ti,k2hk-evm", "ti,k2hk", "ti,keystone"; 16 reserved-memory { 17 #address-cell [all...] |
| /freebsd-src/tests/sys/netinet/ |
| H A D | socket_afinet.c | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 41 #include <atf-c.h> in ATF_TC_BODY() 101 int ss, ss2, cs, rc; in ATF_TC_BODY() 109 /* Server setup. */ in ATF_TC_BODY() 128 cs = socket(PF_INET, SOCK_STREAM, 0); in ATF_TC_BODY() 129 ATF_CHECK(cs > in ATF_TC_BODY() 94 int ss, ss2, cs, rc; ATF_TC_BODY() local 157 int ss, ss2, cs, rc; ATF_TC_BODY() local 242 int ss, cs, rc; ATF_TC_BODY() local [all...] |
| /freebsd-src/sys/dev/spibus/controller/allwinner/ |
| H A D | aw_spi.c | 1 /*- 64 #define AW_SPI_TCR_SS_LEVEL (1 << 7) /* 1 == CS High */ 126 { "allwinner,sun8i-h3-spi", 1 }, 133 { -1, 0 } 156 #define AW_SPI_LOCK(sc) mtx_lock(&(sc)->mtx) 157 #define AW_SPI_UNLOCK(sc) mtx_unlock(&(sc)->mtx) 158 #define AW_SPI_ASSERT_LOCKED(sc) mtx_assert(&(sc)->mtx, MA_OWNED) 159 #define AW_SPI_READ_1(sc, reg) bus_read_1((sc)->res[0], (reg)) 160 #define AW_SPI_WRITE_1(sc, reg, val) bus_write_1((sc)->re 302 aw_spi_setup_cs(struct aw_spi_softc * sc,uint32_t cs,bool low) aw_spi_setup_cs() argument 530 uint32_t cs, mode, clock, reg; aw_spi_transfer() local [all...] |
| /freebsd-src/sys/dev/qcom_qup/ |
| H A D | qcom_spi.c | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 69 { "qcom,spi-qup-v1.1.1", QCOM_SPI_HW_QPI_V1_1 }, 70 { "qcom,spi-qup-v2.1.1", QCOM_SPI_HW_QPI_V2_1 }, 71 { "qcom,spi-qu 81 qcom_spi_set_chipsel(struct qcom_spi_softc * sc,int cs,bool active) qcom_spi_set_chipsel() argument [all...] |
| /freebsd-src/sys/contrib/device-tree/Bindings/spi/ |
| H A D | spi-peripheral-props.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/spi/spi-peripheral-prop [all...] |
| H A D | spi-mux.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/spi/spi-mux.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 12 has chip selects available. An example setup is shown in ASCII art; the actual 16 MOSI /--------------------------------+--------+--------+--------\ 17 MISO |/------------------------------+|-------+|-------+|-------\| 18 SCL ||/----------------------------+||------+||------+||------\|| 20 +------------+ ||| ||| ||| ||| 21 | SoC ||| | +-+++-+ +-+++-+ +-+++-+ +-+++-+ [all …]
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| H A D | renesas,sh-msiof.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/spi/renesas,sh-msiof.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Geert Uytterhoeven <geert+renesas@glider.be> 13 - [all...] |
| /freebsd-src/sys/arm/broadcom/bcm2835/ |
| H A D | bcm2835_dma.c | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 112 /* DMA Control Block - 256bit aligned (p.40) */ 154 {"broadcom,bcm2835-dma", 1}, 155 {"brcm,bcm2835-dma", 1}, 177 uint32_t cs; in bcm_dma_reset() local 183 cs = bus_read_4(sc->sc_mem, BCM_DMA_CS(ch)); in bcm_dma_reset() 185 if (cs & CS_ACTIVE) { in bcm_dma_reset() 187 bus_write_4(sc->sc_mem, BCM_DMA_CS(ch), 0); in bcm_dma_reset() 191 cs = bus_read_4(sc->sc_mem, BCM_DMA_CS(ch)); in bcm_dma_reset() [all …]
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| /freebsd-src/sys/contrib/device-tree/src/arm/intel/pxa/ |
| H A D | pxa300-raumfeld-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 4 #include <dt-bindings/gpio/gpio.h> 5 #include <dt-bindings/input/input.h> 6 #include <dt-bindings/interrupt-controller/irq.h> 10 hw-revision = <0>; 14 stdout-path = &ffuart; 22 reg_3v3: regulator-3v3 { 23 compatible = "regulator-fixed"; 24 regulator-name = "3v3-fixed-supply"; 25 regulator-min-microvolt = <3300000>; [all …]
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| /freebsd-src/lib/librss/ |
| H A D | librss.3 | 7 .Nd Provide Receive-side scaling awareness to userland applications 21 .Fn rss_get_bucket_cpuset "struct rss_config *rc" "rss_bucket_type_t btype" "int bucket" "cpuset_t *cs" 36 initial setup. 38 and optionally binding them to the per-bucket CPU set. 43 .Bd -literal 65 unless they wish to potentially setup different 71 .Bd -literal 84 .Bd -literal 96 Once RSS setup is completed, 118 option indicating the 32-bi [all...] |
| /freebsd-src/sys/contrib/device-tree/src/arm/microchip/ |
| H A D | sama5d3xcm.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * sama5d3xcm.dtsi - Device Tree Include file for SAMA5D3x CPU Module 14 stdout-path = "serial0:115200n8"; 23 clock-frequency = <32768>; 27 clock-frequency = <12000000>; 34 cs-gpios = <&pioD 13 0>, <0>, <0>, <0>; 39 compatible = "atmel,tcb-timer"; 44 compatible = "atmel,tcb-timer"; 51 pinctrl-0 = <&pinctrl_ebi_addr &pinctrl_ebi_cs0>; 52 pinctr-name = "default"; [all …]
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| /freebsd-src/sys/arm/freescale/imx/ |
| H A D | imx_spi.c | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 31 * Driver for imx Enhanced Configurable SPI; master-mode only. 143 {"fsl,imx51-ecspi", true}, 144 {"fsl,imx53-ecspi", true}, 145 {"fsl,imx6dl-ecspi", true}, 146 {"fsl,imx6q-ecsp 201 spi_set_chipsel(struct spi_softc * sc,u_int cs,bool active) spi_set_chipsel() argument 229 spi_hw_setup(struct spi_softc * sc,u_int cs,u_int mode,u_int freq) spi_hw_setup() argument 411 uint32_t cs, mode, clock; spi_transfer() local [all...] |
| /freebsd-src/sys/contrib/device-tree/src/arm/ti/omap/ |
| H A D | omap3-gta04a5one.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2014-18 H. Nikolaus Schaller <hns@goldelico.com> 6 #include "omap3-gta04a5.dts" 13 gpmc_pins: gpmc-pins { 14 pinctrl-single,pins = < 42 /* switch inherited setup to OneNAND */ 45 pinctrl-names = "default"; 46 pinctrl-0 = <&gpmc_pins>; 48 /delete-node/ nand@0,0; 52 #address-cells = <1>; [all …]
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