/freebsd-src/sys/contrib/device-tree/Bindings/spi/ |
H A D | spi-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/spi/spi-controller.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Mark Brown <broonie@kernel.org> 20 pattern: "^spi(@.*|-([ [all...] |
H A D | brcm,bcm2835-aux-spi.txt | 8 - compatible: Should be "brcm,bcm2835-aux-spi". 9 - reg: Should contain register location and length for the spi block 10 - interrupts: Should contain shared interrupt of the aux block 11 - clocks: The clock feeding the SPI controller - needs to 15 - cs-gpios: the cs-gpios (native cs is NOT supported) 16 see also spi-bus.txt 21 compatible = "brcm,bcm2835-aux-spi"; 25 #address-cells = <1>; 26 #size-cells = <0>; 27 cs-gpios = <&gpio 18>, <&gpio 17>, <&gpio 16>; [all …]
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H A D | spi-gpio.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/spi/spi-gpio.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: SPI-GPIO 10 - Rob Herring <robh@kernel.org> 13 This represents a group of 3-n GPIO lines used for bit-banged SPI on 17 - $ref: /schemas/spi/spi-controller.yaml# 21 const: spi-gpio 23 sck-gpios: [all …]
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H A D | fsl-spi.txt | 4 - cell-index : QE SPI subblock index. 7 - compatible : should be "fsl,spi" or "aeroflexgaisler,spictrl". 8 - mode : the SPI operation mode, it can be "cpu" or "cpu-qe". 9 - reg : Offset and length of the register set for the device 10 - interrupts : <a b> where a is the interrupt number and b is a 15 - clock-frequency : input clock frequency to non FSL_SOC cores 18 - cs-gpios : specifies the gpio pins to be used for chipselects. 19 The gpios will be referred to as reg = <index> in the SPI child nodes. 21 - fsl,spisel_boot : for the MPC8306 and MPC8309, specifies that the 23 reg = <number of gpios> in the corresponding child node, i.e. 0 if [all …]
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H A D | spi-samsung.txt | 8 - compatible: should be one of the following. 9 - samsung,s3c2443-spi: for s3c2443, s3c2416 and s3c2450 platforms 10 - samsung,s3c6410-spi: for s3c6410 platforms 11 - samsung,s5pv210-spi: for s5pv210 and s5pc110 platforms 12 - samsung,exynos5433-spi: for exynos5433 compatible controllers 13 - samsung,exynos7-spi: for exynos7 platforms <DEPRECATED> 15 - reg: physical base address of the controller and length of memory mapped 18 - interrupts: The interrupt number to the cpu. The interrupt specifier format 21 - dmas : Two or more DMA channel specifiers following the convention outlined 24 - dma-names: Names for the dma channels. There must be at least one channel [all …]
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H A D | spi_atmel.txt | 4 - compatible : should be "atmel,at91rm9200-spi" or "microchip,sam9x60-spi". 5 - reg: Address and length of the register set for the device 6 - interrupts: Should contain spi interrupt 7 - cs-gpios: chipselects (optional for SPI controller version >= 2 with the 9 - clock-names: tuple listing input clock names. 11 - clocks: phandles to input clocks. 14 - atmel,fifo-size: maximum number of data the RX and TX FIFOs can store for FIFO 20 compatible = "atmel,at91rm9200-spi"; 23 #address-cells = <1>; 24 #size-cells = <0>; [all …]
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H A D | fsl-imx-cspi.txt | 5 - compatible : 6 - "fsl,imx1-cspi" for SPI compatible with the one integrated on i.MX1 7 - "fsl,imx21-cspi" for SPI compatible with the one integrated on i.MX21 8 - "fsl,imx27-cspi" for SPI compatible with the one integrated on i.MX27 9 - "fsl,imx31-cspi" for SPI compatible with the one integrated on i.MX31 10 - "fsl,imx35-cspi" for SPI compatible with the one integrated on i.MX35 11 - "fsl,imx51-ecspi" for SPI compatible with the one integrated on i.MX51 12 - "fsl,imx53-ecspi" for SPI compatible with the one integrated on i.MX53 and later Soc 13 - "fsl,imx8mq-ecspi" for SPI compatible with the one integrated on i.MX8MQ 14 - "fsl,imx8mm-ecspi" for SPI compatible with the one integrated on i.MX8MM [all …]
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/freebsd-src/sys/contrib/device-tree/src/riscv/canaan/ |
H A D | sipeed_maix_bit.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright (C) 2019-20 Sean Anderson <seanga2@gmail.com> 7 /dts-v1/; 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/input/input.h> 13 #include <dt-bindings/leds/common.h> 17 compatible = "sipeed,maix-bit", "sipeed,maix-bit [all...] |
H A D | sipeed_maix_go.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright (C) 2019-20 Sean Anderson <seanga2@gmail.com> 7 /dts-v1/; 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/input/input.h> 13 #include <dt-bindings/leds/common.h> 17 compatible = "sipeed,maix-go", "canaan,kendryte-k21 [all...] |
H A D | canaan_kd233.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright (C) 2019-20 Sean Anderson <seanga2@gmail.com> 7 /dts-v1/; 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/input/input.h> 16 compatible = "canaan,kendryte-kd233", "canaan,kendryte-k210"; 24 stdout-pat [all...] |
H A D | sipeed_maix_dock.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright (C) 2019-20 Sean Anderson <seanga2@gmail.com> 7 /dts-v1/; 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/input/input.h> 13 #include <dt-bindings/leds/common.h> 17 compatible = "sipeed,maix-dock-m [all...] |
H A D | sipeed_maixduino.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright (C) 2019-20 Sean Anderson <seanga2@gmail.com> 7 /dts-v1/; 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/input/input.h> 16 compatible = "sipeed,maixduino", "canaan,kendryte-k210"; 24 stdout-path = "serial0:115200n8"; 27 gpio-key [all...] |
/freebsd-src/sys/contrib/device-tree/Bindings/gpio/ |
H A D | spear_spics.txt | 1 === ST Microelectronics SPEAr SPI CS Driver === 10 Chipselects can be controlled by software by turning them as GPIOs. SPEAr 17 * compatible: should be defined as "st,spear-spics-gpio" 19 * st-spics,peripcfg-reg: peripheral configuration register offset 20 * st-spics,sw-enable-bit: bit offset to enable sw control 21 * st-spics,cs-value-bit: bit offset to drive chipselect low or high 22 * st-spics,cs-enable-mask: chip select number bit mask 23 * st-spics,cs-enable-shift: chip select number program offset 24 * gpio-controller: Marks the device node as gpio controller 25 * #gpio-cells: should be 1 and will mention chip select number [all …]
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/freebsd-src/sys/contrib/device-tree/src/arm/ti/keystone/ |
H A D | keystone-k2hk-evm.dts | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2013-2017 Texas Instruments Incorporated - https://www.ti.com/ 7 /dts-v1/; 10 #include "keystone-k2hk.dtsi" 13 compatible = "ti,k2hk-evm", "ti,k2hk", "ti,keystone"; 16 reserved-memory { 17 #address-cell [all...] |
/freebsd-src/sys/contrib/device-tree/src/arm/st/ |
H A D | stm32mp15xx-dhcor-drc-compact.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) 21 stdout-path = "serial0:115200n8"; 25 compatible = "gpio-leds"; 28 gpios = <&gpioz 6 GPIO_ACTIVE_LOW>; 29 default-state = "off"; 34 gpios = <&gpioz 3 GPIO_ACTIVE_LOW>; 35 default-state = "off"; 40 compatible = "regulator-fixed"; 41 regulator-name = "vio"; 42 regulator-min-microvolt = <3300000>; [all …]
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/freebsd-src/sys/contrib/device-tree/Bindings/mfd/ |
H A D | atmel-usart.txt | 4 - compatible: Should be one of the following: 5 - "atmel,at91rm9200-usart" 6 - "atmel,at91sam9260-usart" 7 - "microchip,sam9x60-usart" 8 - "atmel,at91rm9200-dbgu", "atmel,at91rm9200-usart" 9 - "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart" 10 - "microchip,sam9x60-dbgu", "microchip,sam9x60-usart" 11 - reg: Should contain registers location and length 12 - interrupts: Should contain interrupt 13 - clock-names: tuple listing input clock names. [all …]
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/freebsd-src/sys/contrib/device-tree/src/arm/nxp/imx/ |
H A D | imx6qdl-rex.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 13 stdout-path = &uart1; 16 reg_3p3v: regulator-3p3v { 17 compatible = "regulator-fixed"; 18 regulator-name = "3P3V"; 19 regulator-min-microvolt = <3300000>; 20 regulator-max-microvolt = <3300000>; 21 regulator-always-on; [all …]
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H A D | imx6dl-prtrvt.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 6 /dts-v1/; 8 #include "imx6qdl-prti6q.dtsi" 9 #include <dt-bindings/leds/common.h> 21 compatible = "gpio-leds"; 22 pinctrl-names = "default"; 23 pinctrl-0 = <&pinctrl_leds>; 25 led-debug0 { 27 gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; 28 linux,default-trigger = "heartbeat"; [all …]
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/freebsd-src/sys/contrib/device-tree/Bindings/mtd/ |
H A D | nand-controller.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mtd/nand-controller.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Miquel Raynal <miquel.raynal@bootlin.com> 11 - Richard Weinberger <richard@nod.at> 21 pattern: "^nand-controller(@.*)?" 23 "#address-cells": 26 "#size-cells": 31 cs-gpios: [all …]
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H A D | atmel-nand.txt | 4 Documentation/devicetree/bindings/memory-controllers/atmel,ebi.txt). 11 - compatible: should be one of the following 12 "atmel,at91rm9200-nand-controller" 13 "atmel,at91sam9260-nand-controller" 14 "atmel,at91sam9261-nand-controller" 15 "atmel,at91sam9g45-nand-controlle [all...] |
/freebsd-src/sys/contrib/device-tree/src/arm/microchip/ |
H A D | lan966x-kontron-kswitch-d10-mmt.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 8 #include "dt-bindings/phy/phy-lan966x-serdes.h" 16 stdout-path = "serial0:115200n8"; 19 gpio-restart { 20 compatible = "gpio-restart"; 21 pinctrl-0 = <&reset_pins>; 22 pinctrl-names = "default"; 23 gpios = <&gpio 56 GPIO_ACTIVE_LOW>; 29 atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>; [all …]
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H A D | at91-sama5d3_eds.dts | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 3 * at91-sama5d3_eds.dts - Device Tree file for the SAMA5D3 Ethernet 10 /dts-v1/; 15 compatible = "microchip,sama5d3-eds", "atmel,sama5d36", 19 stdout-path = "serial0:115200n8"; 22 gpio-keys { 23 compatible = "gpio-keys"; 25 pinctrl-names = "default"; 26 pinctrl-0 = <&pinctrl_key_gpio>; 28 button-3 { [all …]
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/freebsd-src/sys/contrib/device-tree/src/powerpc/ |
H A D | ac14xx.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 14 #address-cells = <1>; 15 #size-cells = <1>; 26 timebase-frequency = <40000000>; /* 40 MHz (csb/4) */ 27 bus-frequency = <160000000>; /* 160 MHz csb bus */ 28 clock-frequency = <400000000>; /* 400 MHz ppc core */ 49 compatible = "cfi-flash"; 51 #address-cells = <1>; 52 #size-cells = <1>; 53 bank-width = <2>; [all …]
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/freebsd-src/sys/contrib/device-tree/src/arm64/xilinx/ |
H A D | zynqmp-zcu100-revC.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 5 * (C) Copyright 2016 - 2022, Xilinx, Inc. 6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. 12 /dts-v1/; 15 #include "zynqmp-clk-ccf.dtsi" 16 #include <dt-bindings/input/input.h> 17 #include <dt-binding [all...] |
/freebsd-src/sys/contrib/device-tree/src/arm/marvell/ |
H A D | mmp3-dell-ariel.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 8 /dts-v1/; 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 15 compatible = "dell,wyse-ariel", "marvell,mmp3"; 22 #address-cells = <0x1>; 23 #size-cells = <0x1>; 35 compatible = "spi-gpio"; 36 #address-cells = <1>; 37 #size-cells = <0>; [all …]
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