| /freebsd-src/sys/contrib/device-tree/src/arm64/amd/ |
| H A D | elba-16core.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 * Copyright 2020-2023 Advanced Micro Devices, Inc. 8 #address-cells = <1>; 9 #size-cell [all...] |
| /freebsd-src/sys/contrib/device-tree/src/arm64/hisilicon/ |
| H A D | hip05.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 compatible = "hisilicon,hip05-d02"; 12 interrupt-parent = <&gic>; 13 #address-cell [all...] |
| H A D | hip07.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 compatible = "hisilicon,hip07-d05"; 12 interrupt-parent = <&gic>; 13 #address-cell [all...] |
| /freebsd-src/contrib/processor-trace/libipt/test/src/ |
| H A D | ptunit-cpu.c | 2 * Copyright (c) 2013-2019, Intel Corporation 34 #include "intel-pt.h" 52 struct pt_cpu cpu; in cpu_valid() local 55 error = pt_cpu_parse(&cpu, "6/44/2"); in cpu_valid() 57 ptu_int_eq(cpu.vendor, pcv_intel); in cpu_valid() 58 ptu_uint_eq(cpu.family, 6); in cpu_valid() 59 ptu_uint_eq(cpu.model, 44); in cpu_valid() 60 ptu_uint_eq(cpu.stepping, 2); in cpu_valid() 62 error = pt_cpu_parse(&cpu, "0xf/0x2c/0xf"); in cpu_valid() 64 ptu_int_eq(cpu.vendor, pcv_intel); in cpu_valid() [all …]
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| /freebsd-src/sys/contrib/device-tree/src/arm64/cavium/ |
| H A D | thunder-88xx.dtsi | 2 * Cavium Thunder DTS file - Thunder SoC description 6 * This file is dual-licensed: you can use it either under the terms 13 * published by the Free Software Foundation; either version 2 of the 24 * MA 02110-1301 USA 51 compatible = "cavium,thunder-88xx"; 52 interrupt-parent = <&gic0>; 53 #address-cells = <2>; 54 #size-cells = <2>; [all...] |
| /freebsd-src/sys/contrib/device-tree/src/arm64/freescale/ |
| H A D | fsl-ls2080a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for Freescale Layerscape-2080A family SoC. 5 * Copyright 2014-2016 Freescale Semiconductor, Inc. 12 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 13 #include "fsl-ls208xa.dtsi" 17 compatible = "arm,cortex-a57-pm [all...] |
| H A D | fsl-ls2088a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for Freescale Layerscape-2088A family SoC. 12 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 13 #include "fsl-ls208xa.dtsi" 17 compatible = "arm,cortex-a72-pmu"; 22 &cpu { [all...] |
| /freebsd-src/sys/contrib/device-tree/Bindings/cpu/ |
| H A D | cpu-capacity.txt | 2 CPU capacity bindings 6 1 - Introduction 15 2 - CPU capacity definition 18 CPU capacity is a number that provides the scheduler information about CPUs 19 heterogeneity. Such heterogeneity can come from micro-architectural differences 23 capture a first-order approximation of the relative performance of CPUs. 25 CPU capacities are obtained by running a suitable benchmark. This binding makes 29 * A "single-threaded" or CPU affine benchmark 30 * Divided by the running frequency of the CPU executing the benchmark 31 * Not subject to dynamic frequency scaling of the CPU [all …]
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| H A D | cpu-topology.txt | 2 CPU topology binding description 6 1 - Introduction 12 - socket 13 - cluster 14 - core 15 - thread 18 symmetric multi-threading (SMT) is supported or not. 20 For instance in a system where CPUs support SMT, "cpu" nodes represent all 22 In systems where SMT is not supported "cpu" nodes represent all cores present 25 CPU topology bindings allow one to associate cpu nodes with hierarchical groups [all …]
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| /freebsd-src/sys/contrib/device-tree/Bindings/arm/ |
| H A D | cpu-capacity.txt | 6 1 - Introduction 15 2 - CPU capacity definition 18 CPU capacity is a number that provides the scheduler information about CPUs 19 heterogeneity. Such heterogeneity can come from micro-architectural differences 23 capture a first-order approximation of the relative performance of CPUs. 25 CPU capacities are obtained by running a suitable benchmark. This binding makes 29 * A "single-threaded" or CPU affine benchmark 30 * Divided by the running frequency of the CPU executing the benchmark 31 * Not subject to dynamic frequency scaling of the CPU 36 CPU capacities are obtained by running the Dhrystone benchmark on each CPU at [all …]
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| /freebsd-src/sys/contrib/device-tree/src/arm/samsung/ |
| H A D | exynos5422-cpus.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Samsung Exynos5422 SoC cpu device tree source 8 * This file provides desired ordering for Exynos5422: CPU[0123] being the A7. 10 * The Exynos5420, 5422 and 5800 actually share the same CPU configuration 13 * Exynos5420 and Exynos5800 always boot from Cortex-A15. On Exynos5422 15 * the gpg2-1 GPIO. By default all Exynos5422 based boards choose booting 16 * from the LITTLE: Cortex-A7. 21 #address-cells = <1>; 22 #size-cells = <0>; 24 cpu-map { [all …]
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| H A D | exynos5420-cpus.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Samsung Exynos5420 SoC cpu device tree source 9 * boards: CPU[0123] being the A15. 11 * The Exynos5420, 5422 and 5800 actually share the same CPU configuration 14 * Exynos5420 and Exynos5800 always boot from Cortex-A15. On Exynos5422 16 * the gpg2-1 GPIO. By default all Exynos5422 based boards choose booting 17 * from the LITTLE: Cortex-A7. 22 #address-cells = <1>; 23 #size-cells = <0>; 25 cpu-map { [all …]
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| /freebsd-src/sys/contrib/device-tree/src/arm64/amlogic/ |
| H A D | amlogic-t7.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/power/amlogic,t7-pwrc.h> 8 #include "amlogic-t7-rese [all...] |
| H A D | meson-g12b.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include "meson-g12.dtsi" 13 #address-cells = <0x2>; 14 #size-cells = <0x0>; 16 cpu-map { 19 cpu = <&cpu0>; 23 cpu = <&cpu1>; 29 cpu = <&cpu100>; 33 cpu = <&cpu101>; 37 cpu = <&cpu102>; [all …]
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| /freebsd-src/sys/contrib/device-tree/Bindings/opp/ |
| H A D | opp-v2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/opp/opp-v2.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Viresh Kumar <viresh.kumar@linaro.org> 13 - $ref: opp-v2-base.yaml# 17 const: operating-points-v2 22 - | 24 * Example 1: Single cluster Dual-core ARM cortex A9, switch DVFS states 28 #address-cells = <1>; [all …]
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| /freebsd-src/contrib/bearssl/T0/ |
| H A D | T0Comp.cs | 38 * Command-line entry point. 52 if (!a.StartsWith("-")) { in Main() 56 if (a == "--") { in Main() 65 while (a.StartsWith("-")) { in Main() 151 .GetManifestResourceStream("t0-kernel"))) in Main() 175 " -o file use 'file' as base for output file name (default: 't0out')"); in Usage() 177 " -r name use 'name' as base for run function (default: same as output)"); in Usage() 179 " -m name[,name...]"); in Usage() 183 " -nf disable flow analysis"); in Usage() 194 * value -(y+1). [all …]
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| /freebsd-src/sys/contrib/device-tree/src/arm64/sprd/ |
| H A D | ums9620.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 interrupt-parent = <&gic>; 12 #address-cells = <2>; 13 #size-cell [all...] |
| /freebsd-src/sys/contrib/device-tree/src/arm64/apple/ |
| H A D | t6002.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 5 * Other names: H13J, "Jade 2C" 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/interrupt-controller/apple-aic.h> 12 #include <dt-bindings/interrupt-controller/irq.h> 13 #include <dt-bindings/pinctrl/apple.h> 15 #include "multi-die-cpp.h" 17 #include "t600x-common.dtsi" 20 compatible = "apple,t6002", "apple,arm-platform"; 22 #address-cells = <2>; [all …]
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| H A D | t600x-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 5 * Other names: H13J, "Jade Chop", "Jade", "Jade 2C" 11 #address-cells = <2>; 12 #size-cells = <2>; 15 #address-cells = <2>; 16 #size-cells = <0>; 18 cpu-map { 21 cpu = <&cpu_e00>; 24 cpu = <&cpu_e01>; 30 cpu = <&cpu_p00>; [all …]
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| /freebsd-src/sys/dev/asmc/ |
| H A D | asmcvar.h | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 12 * 2. Redistributions in binary form must reproduce the above copyright 58 #define ASMC_DATAPORT_READ(sc) bus_read_1(sc->sc_ioport, 0x00) 60 bus_write_1(sc->sc_ioport, 0x00, val) 66 #define ASMC_CMDPORT_READ(sc) bus_read_1(sc->sc_iopor [all...] |
| /freebsd-src/sys/contrib/device-tree/src/arm64/arm/ |
| H A D | juno.dts | 4 * Copyright (c) 2013-2014 ARM Ltd. 9 /dts-v1/; 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/arm/coresight-cti-dt.h> 13 #include "juno-base.dtsi" 18 interrupt-parent = <&gic>; 19 #address-cells = <2>; 20 #size-cells = <2>; 27 stdout-path = "serial0:115200n8"; 31 compatible = "arm,psci-0.2"; [all …]
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| /freebsd-src/contrib/libpcap/ |
| H A D | config.sub | 3 # Copyright 1992-2024 Free Software Foundation, Inc. 7 timestamp='2024-01-01' 30 # Please send patches to <config-patches@gnu.org>. 41 # and recognize all the CPU types, system types and aliases 50 # CPU_TYPE-MANUFACTURER-OPERATING_SYSTEM 51 # or in some cases, the newer four-part form: 52 # CPU_TYPE-MANUFACTURER-KERNE [all...] |
| /freebsd-src/contrib/tcpdump/ |
| H A D | config.sub | 3 # Copyright 1992-2024 Free Software Foundation, Inc. 7 timestamp='2024-01-01' 30 # Please send patches to <config-patches@gnu.org>. 41 # and recognize all the CPU types, system types and aliases 50 # CPU_TYPE-MANUFACTURER-OPERATING_SYSTEM 51 # or in some cases, the newer four-part form: 52 # CPU_TYPE-MANUFACTURER-KERNE [all...] |
| /freebsd-src/crypto/openssh/ |
| H A D | config.sub | 3 # Copyright 1992-2022 Free Software Foundation, Inc. 7 timestamp='2022-09-17' 30 # Please send patches to <config-patches@gnu.org>. 41 # and recognize all the CPU types, system types and aliases 50 # CPU_TYPE-MANUFACTURER-OPERATING_SYSTEM 51 # or in some cases, the newer four-part form: 52 # CPU_TYPE-MANUFACTURER-KERNEL-OPERATING_SYSTEM 58 # variety of pre-POSIX systems that do not have POSIX shells at all, and 59 # even some reasonably current systems (Solaris 10 as case-in-point) still 60 # have a pre-POSIX /bin/sh. [all …]
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| /freebsd-src/sys/contrib/device-tree/Bindings/ |
| H A D | numa.txt | 6 1 - Introduction 18 2 - numa-node-id 23 a node id is a 32-bit integer. 26 numa-node-id property which contains the node id of the device. 30 numa-node-id = <0>; 33 numa-node-id = <1>; 36 3 - distance-map 39 The optional device tree node distance-map describes the relative 42 - compatible : Should at least contain "numa-distance-map-v1". 44 - distance-matrix [all …]
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