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Searched +full:coresight +full:- +full:static +full:- +full:replicator (Results 1 – 14 of 14) sorted by relevance

/freebsd-src/sys/contrib/device-tree/Bindings/arm/
H A Darm,coresight-static-replicator.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/arm/arm,coresight-static-replicator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Arm CoreSight Static Trace Bus Replicator
10 - Mathieu Poirier <mathieu.poirier@linaro.org>
11 - Mike Leach <mike.leach@linaro.org>
12 - Leo Yan <leo.yan@linaro.org>
13 - Suzuki K Poulose <suzuki.poulose@arm.com>
16 CoreSight components are compliant with the ARM CoreSight architecture
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H A Dcoresight.txt1 * CoreSight Components:
3 CoreSight components are compliant with the ARM CoreSight architecture
8 sink. Each CoreSight component device should use these properties to describe
11 * Required properties for all components *except* non-configurable replicators
12 and non-configurable funnels:
16 - Embedded Trace Buffer (version 1.0):
17 "arm,coresight-etb10", "arm,primecell";
19 - Trace Port Interface Unit:
20 "arm,coresight-tpiu", "arm,primecell";
22 - Trace Memory Controller, used for Embedded Trace Buffer(ETB),
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/freebsd-src/sys/arm64/coresight/
H A Dcoresight_replicator_fdt.c1 /*-
2 * Copyright (c) 2018-2020 Ruslan Bukin <br@bsdpad.com>
7 * FA8650-15-C-7558 ("CADETS"), as part of the DARPA Transparent Computing
43 #include <arm64/coresight/coresight.h>
44 #include <arm64/coresight/coresight_replicator.h>
48 static struct ofw_compat_data compat_data[] = {
49 { "arm,coresight-dynamic-replicator", 1 },
53 static int
59 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) in replicator_fdt_probe()
62 device_set_desc(dev, "ARM Coresight Replicator"); in replicator_fdt_probe()
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H A Dcoresight_replicator_acpi.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
8 * Technology) under DARPA contract HR0011-18-C-0016 ("ECATS"), as part of the
47 #include <arm64/coresight/coresight.h>
48 #include <arm64/coresight/coresight_replicator.h>
50 static int
53 static char *replicator_ids[] = { "ARMHC98D", NULL }; in replicator_acpi_probe()
59 device_set_desc(dev, "ARM Coresight Replicator"); in replicator_acpi_probe()
64 static int
70 sc->pdata = coresight_acpi_get_platform_data(dev); in replicator_acpi_attach()
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H A Dcoresight_replicator.c1 /*-
2 * Copyright (c) 2018-2020 Ruslan Bukin <br@bsdpad.com>
7 * FA8650-15-C-7558 ("CADETS"), as part of the DARPA Transparent Computing
40 #include <arm64/coresight/coresight.h>
41 #include <arm64/coresight/coresight_replicator.h>
45 static struct resource_spec replicator_spec[] = {
47 { -1, 0 }
50 static int
57 /* Unlock Coresight */ in replicator_init()
58 bus_write_4(sc->res, CORESIGHT_LAR, CORESIGHT_UNLOCK); in replicator_init()
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H A Dcoresight_etm4x.c1 /*-
2 * Copyright (c) 2018-2020 Ruslan Bukin <br@bsdpad.com>
7 * FA8650-15-C-7558 ("CADETS"), as part of the DARPA Transparent Computing
40 #include <arm64/coresight/coresight.h>
41 #include <arm64/coresight/coresight_etm4x.h>
57 * CPU0 -> ETM0 -> funnel1 -> funnel0 -> ETF -> replicator -> ETR -> DRAM
58 * CPU1 -> ETM1 -> funnel1 -^
59 * CPU2 -> ETM2 -> funnel1 -^
60 * CPU3 -> ETM3 -> funnel1 -^
63 static struct resource_spec etm_spec[] = {
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/freebsd-src/sys/contrib/device-tree/src/arm/hisilicon/
H A Dhip04.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013-2014 HiSilicon Ltd.
6 * Copyright (C) 2013-2014 Linaro Ltd.
12 /* memory bus is 64-bit */
13 #address-cells = <2>;
14 #size-cells = <2>;
21 compatible = "hisilicon,hip04-bootwrapper";
22 boot-method = <0x10c00000 0x10000>, <0xe0000100 0x1000>;
26 #address-cells = <1>;
27 #size-cells = <0>;
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/freebsd-src/sys/contrib/device-tree/src/arm64/hisilicon/
H A Dhi3660-coresight.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 * dtsi for Hisilicon Hi3660 Coresight
6 * Copyright (C) 2016-2018 HiSilicon Ltd.
15 compatible = "arm,coresight-etm4x", "arm,primecell";
18 clock-names = "apb_pclk";
21 out-ports {
24 remote-endpoint =
32 compatible = "arm,coresight-etm4x", "arm,primecell";
35 clock-names = "apb_pclk";
38 out-ports {
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H A Dhi6220-coresight.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * dtsi file for Hisilicon Hi6220 coresight
14 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
17 clock-names = "apb_pclk";
19 out-ports {
22 remote-endpoint =
28 in-ports {
31 remote-endpoint =
39 compatible = "arm,coresight-tmc", "arm,primecell";
42 clock-names = "apb_pclk";
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/freebsd-src/sys/contrib/device-tree/src/arm/xilinx/
H A Dzynq-7000.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2011 - 2014 Xilinx
7 #address-cells = <1>;
8 #size-cells = <1>;
9 compatible = "xlnx,zynq-7000";
12 #address-cells = <1>;
13 #size-cells = <0>;
16 compatible = "arm,cortex-a9";
20 clock-latency = <1000>;
21 cpu0-supply = <&regulator_vccpint>;
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/freebsd-src/sys/contrib/device-tree/src/arm/arm/
H A Dvexpress-v2p-ca15_a7.dts1 // SPDX-License-Identifier: GPL-2.0
6 * Cortex-A15_A7 MPCore (V2P-CA15_A7)
8 * HBI-0249A
11 /dts-v1/;
12 #include "vexpress-v2m-rs1.dtsi"
15 model = "V2P-CA15_CA
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/freebsd-src/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx7s.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
6 #include <dt-bindings/clock/imx7d-clock.h>
7 #include <dt-bindings/power/imx7-power.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-binding
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/freebsd-src/sys/contrib/device-tree/src/arm/st/
H A Dste-dbx5x0.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/clock/ste-db8500-clkout.h>
9 #include <dt-bindings/reset/stericsson,db8500-prcc-reset.h>
10 #include <dt-bindings/mfd/dbx500-prcmu.h>
11 #include <dt-bindings/arm/ux500_pm_domains.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/thermal/thermal.h>
16 #address-cells = <1>;
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/freebsd-src/sys/contrib/device-tree/src/arm/qcom/
H A Dqcom-apq8064.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/clock/qcom,gcc-msm8960.h>
5 #include <dt-bindings/clock/qcom,lcc-msm8960.h>
6 #include <dt-bindings/reset/qcom,gcc-msm896
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