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/freebsd-src/sys/contrib/device-tree/Bindings/interrupt-controller/
H A Dsamsung,exynos4210-combiner.txt8 The interrupt combiner controller consists of multiple combiners. Up to eight
14 controller module (which includes multiple combiners). A combiner in the
16 combiners. For example, a 32-bit interrupt enable/disable config register
17 can accommodate up to 4 interrupt combiners (with each combiner supporting
27 - interrupts: The list of interrupts generated by the combiners which are then
32 - samsung,combiner-nr: The number of interrupt combiners supported. If this
33 property is not specified, the default number of combiners is assumed
H A Dsamsung,exynos4210-combiner.yaml18 The interrupt combiner controller consists of multiple combiners. Up to eight
24 controller module (which includes multiple combiners). A combiner in the
26 combiners. For example, a 32-bit interrupt enable/disable config register can
27 accommodate up to 4 interrupt combiners (with each combiner supporting up to
55 The number of interrupt combiners supported. Should match number
/freebsd-src/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DCombiner.h9 /// This contains the base class for all Combiners generated by TableGen.
H A DGIMatchTableExecutor.h565 /// instruction selector and instruction combiners as their engine to match and
/freebsd-src/contrib/llvm-project/llvm/utils/TableGen/GlobalISel/
H A DMatchDataInfo.h
/freebsd-src/contrib/llvm-project/llvm/utils/TableGen/
H A DGlobalISelCombinerEmitter.cpp72 SelectedCombiners("combiners", cl::desc("Emit the specified combiners"),
228 /// care about them for combiners.
2011 // Don't allow mutating opcodes for GISel combiners. We want a more precise in emitPatFragMatchPattern()
2014 // TODO: We don't mutate very often, if at all in combiners, but it'd be nice in emitPatFragMatchPattern()
2705 PrintFatalError("No combiners selected with -combiners"); in emitRuleConfigImpl()
H A DGlobalISelMatchTable.cpp
/freebsd-src/lib/clang/libllvm/
H A DMakefile2156 O0PreLegalizeGICombiner/-gen-global-isel-combiner,-combiners=${arch:H}O0PreLegalizerCombiner \
2157 PostLegalizeGICombiner/-gen-global-isel-combiner,-combiners=${arch:H}PostLegalizerCombiner \
2158 PostLegalizeGILowering/-gen-global-isel-combiner,-combiners=${arch:H}PostLegalizerLowering \
2159 PreLegalizeGICombiner/-gen-global-isel-combiner,-combiners=${arch:H}PreLegalizerCombiner \
/freebsd-src/contrib/llvm-project/llvm/include/llvm/Transforms/InstCombine/
H A DInstCombiner.h350 // Call target specific combiners in getSafeVectorConstantForBinop()
/freebsd-src/contrib/llvm-project/llvm/include/llvm/Target/GlobalISel/
H A DCombine.td59 // Combiners can use this so they're free to define tryCombineAll themselves
1855 // A combine group used to for prelegalizer combiners at -O0. The combines in
/freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPULegalizerInfo.cpp6311 /// to exposes all register repacking to the legalizer/combiners. We also don't in legalizeImageIntrinsic()
7479 // FIXME: This is to workaround the inability of tablegen match combiners to
/freebsd-src/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetLowering.h4126 /// information about sign bits to GlobalISel combiners. The DemandedElts in unwrapAddress()
/freebsd-src/contrib/llvm-project/clang/lib/Sema/
H A DSemaTemplateInstantiateDecl.cpp3685 // Combiners instantiation sequence. in VisitOMPDeclareReductionDecl()