Searched full:coherence (Results 1 – 25 of 35) sorted by relevance
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305 depends on support for cache coherence in the underlying architecture.306 In general, cache coherence on the default memory type,310 For example, cache coherence is guaranteed on write-back memory by the315 However, on some architectures, cache coherence might not be enabled on all317 To determine if cache coherence is enabled for a non-default memory type,
75 the cache coherence.96 This number should be kept low to avoid the cache coherence problems.
22 /// the cache coherence domain
13 The Tag-and-Data units (TADs) maintain coherence and contain CN10K
45 power-isa-mmc; // Memory Coherence
53 power-isa-mmc; // Memory Coherence
137 // is not required for instruction to data coherence. in __clear_cache()147 // unification is not required for instruction to data coherence. in __clear_cache()
59 Christopher. A. Kent, \fICache Coherence in Distributed Systems\fR,
44 to the coherence of the paper.
7 Consistency and coherence are one of the key characteristics of good software.
171 Events that require a cache coherence qualifier to be specified use an
159 Events that require a cache coherence qualifier to be specified use an
170 Events that require a cache coherence qualifier to be specified use an
169 Events that require a cache coherence qualifier to be specified use an
358 * coherence domain. in pmap_force_invalidate_cache_range()
517 /// - MTYPE set to support memory coherence specified in
274 * always be aligned to the coherence granularity -- generally 64 bytes.)
1204 * This can cause a loss of coherence between ARC and page cache in zfs_domount()
994 * For SMP, these functions have to use IPIs for coherence. in pmap_invalidate_all() 4825 * required for data coherence. in pmap_mincore()
2791 I've never seen a class-C sized network with such coherence.
2859 * use MAP_ASYNC to trade on-disk coherence for speed. in vn_mmap()
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