| /freebsd-src/sys/contrib/device-tree/src/arm64/freescale/ |
| H A D | fsl-lx2160a-tqmlx2160a-mblx2160a.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 3 * Copyright (c) 2020-2023 TQ-Systems GmbH <linux@ew.tq-group.com>, 4 * D-82229 Seefeld, Germany. 8 /dts-v [all...] |
| H A D | imx8mn-tqma8mqnl-mba8mx.dts | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) 3 * Copyright 2020-2021 TQ-Systems GmbH 6 /dts-v1/; 8 #include "imx8mn-tqma8mqnl.dtsi" 12 model = "TQ-System [all...] |
| H A D | imx93-tqma9352-mba93xxla.dts | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) 3 * Copyright (c) 2022-2023 TQ-Systems GmbH <linux@ew.tq-group.com>, 4 * D-82229 Seefeld, Germany. 8 /dts-v [all...] |
| H A D | imx8mp-tqma8mpql-mba8mpxl.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 3 * Copyright 2021-2022 TQ-Systems GmbH 4 * Author: Alexander Stein <alexander.stein@tq-group.com> 7 /dts-v1/; 9 #include <dt-binding [all...] |
| H A D | imx8mp-phycore-som.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 7 #include <dt-bindings/net/ti-dp83867.h> 11 model = "PHYTEC phyCORE-i.MX8MP"; 12 compatible = "phytec,imx8mp-phycore-som", "fsl,imx8mp"; 24 reg_vdd_io: regulator-vdd-i [all...] |
| H A D | imx93-tqma9352-mba93xxca.dts | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) 3 * Copyright (c) 2022-2023 TQ-Systems GmbH <linux@ew.tq-group.com>, 4 * D-82229 Seefeld, Germany. 8 /dts-v [all...] |
| H A D | imx8mp-phyboard-pollux-rdk.dts | 1 // SPDX-License-Identifier: GPL-2.0 7 /dts-v1/; 9 #include <dt-bindings/phy/phy-imx8-pcie.h> 10 #include <dt-bindings/leds/leds-pca9532.h> 11 #include <dt-binding [all...] |
| H A D | imx8mp-msc-sm2s.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 6 /dts-v1/; 9 #include <dt-bindings/net/ti-dp83867.h> 18 stdout-path = &uart2; 21 reg_usb0_host_vbus: regulator-usb0-vbus { 22 compatible = "regulator-fixe [all...] |
| /freebsd-src/sys/contrib/device-tree/Bindings/net/ |
| H A D | ti,dp83869.yaml | 1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause) 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - $ref: ethernet-phy.yaml# 14 - Andrew Davis <afd@ti.com> 17 The DP83869HM device is a robust, fully-featured Gigabit (PHY) transceiver 18 with integrated PMD sublayers that supports 10BASE-Te, 100BASE-TX and 19 1000BASE-T Ethernet protocols. The DP83869 also supports 1000BASE-X and 20 100BASE-FX Fiber protocols. 23 the DP83869HM can run 1000BASE-X-to-1000BASE-T and 100BASE-FX-to-100BASE-TX [all …]
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| H A D | ti,dp83867.yaml | 1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause) 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - $ref: ethernet-controller.yaml# 14 - Andrew Davis <afd@ti.com> 18 transceiver with integrated PMD sublayers to support 10BASE-Te, 100BASE-TX 19 and 1000BASE-T Ethernet protocols. 34 nvmem-cells: 40 nvmem-cell-names: 42 - const: io_impedance_ctrl [all …]
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| /freebsd-src/sys/contrib/device-tree/Bindings/media/ |
| H A D | mediatek,vcodec-subdev-decoder.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/media/mediatek,vcodec-subdev-decoder.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Yunfei Dong <yunfei.dong@mediatek.com> 20 +------------------------------------------------+-------------------------------------+ 22 | input -> lat soc HW -> lat HW -> lat buffer --|--> lat buffer -> core HW -> output | 24 +------------||-------------||-------------------+---------------------||--------------+ 26 -------------||-------------||-------------------|---------------------||--------------- 27 ||<------------||----------------HW index---------------->|| <child> [all …]
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| /freebsd-src/sys/contrib/device-tree/src/arm/nxp/ls/ |
| H A D | ls1021a-tqmls1021a-mbls1021a.dts | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR X11) 3 * Copyright 2013-2014 Freescale Semiconductor, Inc. 4 * Copyright 2018-2023 TQ-Systems GmbH <linux@ew.tq-group.com>, 5 * D-82229 Seefeld, Germany. 9 /dts-v1/; 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/input/linux-event-codes.h> 13 #include <dt-bindings/leds/common.h> 14 #include <dt-bindings/leds/leds-pca9532.h> 15 #include <dt-bindings/net/ti-dp83867.h> [all …]
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| /freebsd-src/sys/contrib/device-tree/src/arm64/mediatek/ |
| H A D | mt2712e.dtsi | 5 * SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 #include <dt-bindings/clock/mt2712-clk.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/interrupt-controlle [all...] |
| H A D | mt8188.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 7 /dts-v1/; 8 #include <dt-bindings/clock/mediatek,mt8188-clk.h> 9 #include <dt-bindings/interrupt-controller/arm-gi [all...] |
| H A D | mt8192.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 7 /dts-v1/; 8 #include <dt-bindings/clock/mt8192-clk.h> 9 #include <dt-bindings/gce/mt8192-gce.h> 10 #include <dt-binding [all...] |
| H A D | mt8186.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 * Author: Allen-KH Cheng <allen-kh.cheng@mediatek.com> 6 /dts-v1/; 7 #include <dt-binding [all...] |
| /freebsd-src/sys/contrib/device-tree/Bindings/display/msm/ |
| H A D | hdmi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 6 $schema: http://devicetree.org/meta-schema [all...] |
| H A D | hdmi.txt | 1 Qualcomm adreno/snapdragon hdmi output 4 - compatible: one of the following 5 * "qcom,hdmi-tx-8996" 6 * "qcom,hdmi-tx-8994" 7 * "qcom,hdmi-tx-8084" 8 * "qcom,hdmi-tx-8974" 9 * "qcom,hdmi-tx-8660" 10 * "qcom,hdmi-tx-8960" 11 - reg: Physical base address and length of the controller's registers 12 - reg-names: "core_physical" [all …]
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| /freebsd-src/sys/contrib/device-tree/src/arm/mediatek/ |
| H A D | mt2701.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/clock/mt2701-clk.h> 9 #include <dt-bindings/phy/phy.h> 10 #include <dt-bindings/power/mt2701-power.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/memory/mt2701-larb-port.h> 14 #include <dt-bindings/reset/mt2701-resets.h> 15 #include "mt2701-pinfunc.h" 18 #address-cells = <2>; [all …]
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| H A D | mt7623.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (c) 2017-2018 MediaTek Inc. 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-binding [all...] |
| /freebsd-src/sys/contrib/device-tree/src/arm/nxp/imx/ |
| H A D | imx7d-mba7.dts | 1 // SPDX-License-Identifier: GPL-2.0 OR X11 3 * Device Tree Source for TQ-Systems TQMa7D board on MBa7 carrier board. 5 * Copyright (C) 2016 TQ-Systems GmbH 6 * Author: Markus Niebel <Markus.Niebel@tq-group.com> 10 /dts-v1/; 12 #include "imx7d-tqma7.dtsi" 13 #include "imx7-mba7.dtsi" 16 model = "TQ-System [all...] |
| /freebsd-src/sys/contrib/device-tree/Bindings/pinctrl/ |
| H A D | nvidia,tegra124-pinmux.txt | 4 pinctrl binding, as described in nvidia,tegra20-pinmux.txt and 5 nvidia,tegra30-pinmux.txt. In fact, this document assumes that binding as 9 - compatible: For Tegra124, must contain "nvidia,tegra124-pinmux". For 10 Tegra132, must contain '"nvidia,tegra132-pinmux", "nvidia-tegra124-pinmux"'. 11 - reg: Should contain a list of base address and size pairs for: 12 -- first entry - the drive strength and pad control registers. 13 -- second entry - the pinmux registers 14 -- third entry - the MIPI_PAD_CTRL register 18 include/dt-binding/pinctrl/pinctrl-tegra.h. 19 - nvidia,enable-input: Integer. Enable the pin's input path. [all …]
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| /freebsd-src/sys/contrib/device-tree/src/arm/ti/omap/ |
| H A D | am43xx-clocks.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 8 sys_clkin_ck: clock-sys-clkin-31@40 { 9 #clock-cells = <0>; 10 compatible = "ti,mux-clock"; 11 clock-output-names = "sys_clkin_ck"; 13 ti,bit-shift = <31>; 17 crystal_freq_sel_ck: clock-crystal-freq-sel-29@40 { 18 #clock-cells = <0>; 19 compatible = "ti,mux-clock"; 20 clock-output-names = "crystal_freq_sel_ck"; [all …]
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| /freebsd-src/sys/contrib/device-tree/src/arm/st/ |
| H A D | stm32mp157c-phycore-stm32mp15-som.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (C) 2022-2023 Steffen Trumtrar <kernel@pengutronix.de> 4 * Copyright (C) Phytec GmbH 2019-2020 - All Rights Reserved 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/leds/common.h> 13 #include <dt-bindings/leds/leds-pca9532.h> 14 #include <dt-bindings/mfd/st,stpmic1.h> [all …]
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| /freebsd-src/sys/contrib/device-tree/src/arm64/ti/ |
| H A D | k3-am65-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/ 7 #include <dt-bindings/phy/phy-am654-serdes.h> 11 compatible = "mmio-sra [all...] |